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Searched refs:rdiv (Results 1 – 10 of 10) sorted by relevance

/linux-6.6.21/arch/mips/cavium-octeon/
Dcsrc-octeon.c26 static u64 rdiv; variable
46 rdiv = rst_boot.s.c_mul; /* CPU clock */ in octeon_setup_delays()
53 rdiv = rst_boot.s.c_mul; /* CPU clock */ in octeon_setup_delays()
87 if (rdiv != 0) { in octeon_init_cvmcount()
88 clk_count *= rdiv; in octeon_init_cvmcount()
198 if (rdiv != 0) { in octeon_io_clk_delay()
199 end = count * rdiv; in octeon_io_clk_delay()
/linux-6.6.21/drivers/clk/imx/
Dclk-fracn-gppll.c52 .rdiv = (_rdiv), \
62 .rdiv = (_rdiv), \
156 u32 mfi, mfn, mfd, rdiv, odiv; in clk_fracn_gppll_recalc_rate() local
170 rdiv = FIELD_GET(PLL_RDIV_MASK, pll_div); in clk_fracn_gppll_recalc_rate()
181 rate_table[i].mfd == mfd && rate_table[i].rdiv == rdiv && in clk_fracn_gppll_recalc_rate()
189 if (!rdiv) in clk_fracn_gppll_recalc_rate()
190 rdiv = rdiv + 1; in clk_fracn_gppll_recalc_rate()
206 do_div(fvco, rdiv * odiv); in clk_fracn_gppll_recalc_rate()
210 do_div(fvco, mfd * rdiv * odiv); in clk_fracn_gppll_recalc_rate()
252 pll_div = FIELD_PREP(PLL_RDIV_MASK, rate->rdiv) | rate->odiv | in clk_fracn_gppll_set_rate()
Dclk.h85 unsigned int rdiv; member
/linux-6.6.21/drivers/clk/
Dclk-si5351.c1022 unsigned char rdiv; in si5351_clkout_recalc_rate() local
1029 rdiv = si5351_reg_read(hwdata->drvdata, reg); in si5351_clkout_recalc_rate()
1031 rdiv &= SI5351_OUTPUT_CLK6_DIV_MASK; in si5351_clkout_recalc_rate()
1033 rdiv &= SI5351_OUTPUT_CLK_DIV_MASK; in si5351_clkout_recalc_rate()
1034 rdiv >>= SI5351_OUTPUT_CLK_DIV_SHIFT; in si5351_clkout_recalc_rate()
1037 return parent_rate >> rdiv; in si5351_clkout_recalc_rate()
1046 unsigned char rdiv; in si5351_clkout_determine_rate() local
1061 rdiv = SI5351_OUTPUT_CLK_DIV_1; in si5351_clkout_determine_rate()
1063 rdiv < SI5351_OUTPUT_CLK_DIV_128) { in si5351_clkout_determine_rate()
1064 rdiv += 1; in si5351_clkout_determine_rate()
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/linux-6.6.21/drivers/net/ethernet/marvell/octeontx2/nic/
Dcn10k.c267 u32 *rate_mantissa, u32 *rdiv) in cn10k_get_ingress_rate_cfg() argument
298 *rdiv = div; in cn10k_get_ingress_rate_cfg()
366 u32 rdiv; in cn10k_set_ipolicer_rate() local
370 cn10k_get_ingress_rate_cfg(rate, &rate_exp, &rate_mantissa, &rdiv); in cn10k_set_ipolicer_rate()
394 aq->prof.rdiv = rdiv; in cn10k_set_ipolicer_rate()
395 aq->prof_mask.rdiv = 0xF; in cn10k_set_ipolicer_rate()
/linux-6.6.21/drivers/media/tuners/
Dtda18250.c428 static int tda18250_pll_calc(struct dvb_frontend *fe, u8 *rdiv, in tda18250_pll_calc() argument
451 *rdiv = 1; in tda18250_pll_calc()
457 *rdiv = 3; in tda18250_pll_calc()
463 *rdiv = 2; in tda18250_pll_calc()
467 *rdiv = 2; in tda18250_pll_calc()
471 *rdiv = 3; in tda18250_pll_calc()
477 *rdiv = 2; in tda18250_pll_calc()
487 lopd, scale, fvco, *rdiv, *ndiv, *icp); in tda18250_pll_calc()
/linux-6.6.21/drivers/clk/socfpga/
Dclk-pll-s10.c44 unsigned long fdiv, reg, rdiv, qdiv; in n5x_clk_pll_recalc_rate() local
50 rdiv = (reg & SOCFPGA_N5X_PLLDIV_RDIV_MASK); in n5x_clk_pll_recalc_rate()
58 return ((parent_rate * 2 * (fdiv + 1)) / ((rdiv + 1) * power)); in n5x_clk_pll_recalc_rate()
/linux-6.6.21/drivers/spi/
Dspi-loongson-core.c44 static const char rdiv[12] = {0, 1, 4, 2, 3, 5, 6, 7, 8, 9, 10, 11}; in loongson_spi_set_clk() local
47 div_tmp = rdiv[fls(div - 1)]; in loongson_spi_set_clk()
/linux-6.6.21/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_struct.h725 uint64_t rdiv : 4; member
Drvu_debugfs.c2191 seq_printf(m, "W1: rdiv\t\t%d\n", prof->rdiv); in print_band_prof_ctx()