| /linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | gddr5.c | 35 nvkm_gddr5_calc(struct nvkm_ram *ram, bool nuts) in nvkm_gddr5_calc() argument
39 int rq = ram->freq < 1000000; /* XXX */ in nvkm_gddr5_calc()
41 xd = !ram->next->bios.ramcfg_DLLoff; in nvkm_gddr5_calc()
43 switch (ram->next->bios.ramcfg_ver) { in nvkm_gddr5_calc()
45 pd = ram->next->bios.ramcfg_11_01_80; in nvkm_gddr5_calc()
46 lf = ram->next->bios.ramcfg_11_01_40; in nvkm_gddr5_calc()
47 vh = ram->next->bios.ramcfg_11_02_10; in nvkm_gddr5_calc()
48 vr = ram->next->bios.ramcfg_11_02_04; in nvkm_gddr5_calc()
49 vo = ram->next->bios.ramcfg_11_06; in nvkm_gddr5_calc()
50 l3 = !ram->next->bios.ramcfg_11_07_02; in nvkm_gddr5_calc()
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| D | ramgk104.c | 143 struct gk104_ram *ram = container_of(fuc, typeof(*ram), fuc); in gk104_ram_train() local
149 for (i = 0; (data & 0x80000000) && i < ram->parts; addr += 0x1000, i++) { in gk104_ram_train()
150 if (ram->pmask & (1 << i)) in gk104_ram_train()
159 struct gk104_ram *ram = container_of(fuc, typeof(*ram), fuc); in r1373f4_init() local
160 const u32 mcoef = ((--ram->P2 << 28) | (ram->N2 << 8) | ram->M2); in r1373f4_init()
161 const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); in r1373f4_init()
162 const u32 runk0 = ram->fN1 << 16; in r1373f4_init()
163 const u32 runk1 = ram->fN1; in r1373f4_init()
165 if (ram->from == 2) { in r1373f4_init()
191 if (ram->mode == 2) { in r1373f4_init()
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| D | gddr3.c | 71 nvkm_gddr3_calc(struct nvkm_ram *ram) in nvkm_gddr3_calc() argument
75 switch (ram->next->bios.timing_ver) { in nvkm_gddr3_calc()
77 CWL = ram->next->bios.timing_10_CWL; in nvkm_gddr3_calc()
78 CL = ram->next->bios.timing_10_CL; in nvkm_gddr3_calc()
79 WR = ram->next->bios.timing_10_WR; in nvkm_gddr3_calc()
80 DLL = !ram->next->bios.ramcfg_DLLoff; in nvkm_gddr3_calc()
81 ODT = ram->next->bios.timing_10_ODT; in nvkm_gddr3_calc()
82 RON = ram->next->bios.ramcfg_RON; in nvkm_gddr3_calc()
85 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; in nvkm_gddr3_calc()
86 CL = (ram->next->bios.timing[1] & 0x0000001f) >> 0; in nvkm_gddr3_calc()
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| D | sddr3.c | 70 nvkm_sddr3_calc(struct nvkm_ram *ram) in nvkm_sddr3_calc() argument
74 DLL = !ram->next->bios.ramcfg_DLLoff; in nvkm_sddr3_calc()
76 switch (ram->next->bios.timing_ver) { in nvkm_sddr3_calc()
78 if (ram->next->bios.timing_hdr < 0x17) { in nvkm_sddr3_calc()
82 CWL = ram->next->bios.timing_10_CWL; in nvkm_sddr3_calc()
83 CL = ram->next->bios.timing_10_CL; in nvkm_sddr3_calc()
84 WR = ram->next->bios.timing_10_WR; in nvkm_sddr3_calc()
85 ODT = ram->next->bios.timing_10_ODT; in nvkm_sddr3_calc()
88 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; in nvkm_sddr3_calc()
89 CL = (ram->next->bios.timing[1] & 0x0000001f) >> 0; in nvkm_sddr3_calc()
[all …]
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| D | ramnv50.c | 73 nv50_ram_timing_calc(struct nv50_ram *ram, u32 *timing) in nv50_ram_timing_calc() argument
75 struct nvbios_ramcfg *cfg = &ram->base.target.bios; in nv50_ram_timing_calc()
76 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv50_ram_timing_calc()
86 switch ((!T(CWL)) * ram->base.type) { in nv50_ram_timing_calc()
97 unkt3b = 0x19 + ram->base.next->bios.rammap_00_16_40; in nv50_ram_timing_calc()
99 ram->base.next->bios.rammap_00_16_40) << 16 | in nv50_ram_timing_calc()
133 if (ram->base.type == NVKM_RAM_TYPE_DDR2) { in nv50_ram_timing_calc()
137 if (ram->base.type == NVKM_RAM_TYPE_GDDR3) { in nv50_ram_timing_calc()
151 nv50_ram_timing_read(struct nv50_ram *ram, u32 *timing) in nv50_ram_timing_read() argument
154 struct nvbios_ramcfg *cfg = &ram->base.target.bios; in nv50_ram_timing_read()
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| D | ram.c | 33 struct nvkm_ram *ram; member
41 return nvkm_instobj_wrap(nvkm_vram(memory)->ram->fb->subdev.device, memory, pmemory); in nvkm_vram_kmap()
91 mutex_lock(&vram->ram->mutex); in nvkm_vram_dtor()
94 nvkm_mm_free(&vram->ram->vram, &node); in nvkm_vram_dtor()
96 mutex_unlock(&vram->ram->mutex); in nvkm_vram_dtor()
115 struct nvkm_ram *ram; in nvkm_ram_get() local
125 if (!device->fb || !(ram = device->fb->ram)) in nvkm_ram_get()
127 ram = device->fb->ram; in nvkm_ram_get()
128 mm = &ram->vram; in nvkm_ram_get()
133 vram->ram = ram; in nvkm_ram_get()
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| D | ramgf100.c | 109 struct gf100_ram *ram = container_of(fuc, typeof(*ram), fuc); in gf100_ram_train() local
110 struct nvkm_fb *fb = ram->base.fb; in gf100_ram_train()
129 struct gf100_ram *ram = gf100_ram(base); in gf100_ram_calc() local
130 struct gf100_ramfuc *fuc = &ram->fuc; in gf100_ram_calc()
131 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in gf100_ram_calc()
180 ret = ram_init(fuc, ram->base.fb); in gf100_ram_calc()
215 ret = gt215_pll_calc(subdev, &ram->refpll, ram->mempll.refclk, in gf100_ram_calc()
230 ret = gt215_pll_calc(subdev, &ram->mempll, freq, in gf100_ram_calc()
409 struct gf100_ram *ram = gf100_ram(base); in gf100_ram_prog() local
410 struct nvkm_device *device = ram->base.fb->subdev.device; in gf100_ram_prog()
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| D | sddr2.c | 61 nvkm_sddr2_calc(struct nvkm_ram *ram) in nvkm_sddr2_calc() argument
65 switch (ram->next->bios.timing_ver) { in nvkm_sddr2_calc()
67 CL = ram->next->bios.timing_10_CL; in nvkm_sddr2_calc()
68 WR = ram->next->bios.timing_10_WR; in nvkm_sddr2_calc()
69 DLL = !ram->next->bios.ramcfg_DLLoff; in nvkm_sddr2_calc()
70 ODT = ram->next->bios.timing_10_ODT & 3; in nvkm_sddr2_calc()
73 CL = (ram->next->bios.timing[1] & 0x0000001f); in nvkm_sddr2_calc()
74 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_sddr2_calc()
80 if (ram->next->bios.timing_ver == 0x20 || in nvkm_sddr2_calc()
81 ram->next->bios.ramcfg_timing == 0xff) { in nvkm_sddr2_calc()
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| D | ramgt215.c | 154 gt215_link_train(struct gt215_ram *ram) in gt215_link_train() argument
156 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train()
157 struct gt215_ramfuc *fuc = &ram->fuc; in gt215_link_train()
158 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in gt215_link_train()
194 ret = ram->base.func->calc(&ram->base, (u32) M0205T.freq * 1000); in gt215_link_train()
237 ram->base.func->calc(&ram->base, clk_current); in gt215_link_train()
246 ram_train_result(ram->base.fb, result, 64); in gt215_link_train()
272 gt215_link_train_init(struct gt215_ram *ram) in gt215_link_train_init() argument
280 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train_init()
281 struct nvkm_device *device = ram->base.fb->subdev.device; in gt215_link_train_init()
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| D | ramfuc.h | 59 ramfuc_init(struct ramfuc *ram, struct nvkm_fb *fb) in ramfuc_init() argument
61 int ret = nvkm_memx_init(fb->subdev.device->pmu, &ram->memx); in ramfuc_init()
65 ram->sequence++; in ramfuc_init()
66 ram->fb = fb; in ramfuc_init()
71 ramfuc_exec(struct ramfuc *ram, bool exec) in ramfuc_exec() argument
74 if (ram->fb) { in ramfuc_exec()
75 ret = nvkm_memx_fini(&ram->memx, exec); in ramfuc_exec()
76 ram->fb = NULL; in ramfuc_exec()
82 ramfuc_rd32(struct ramfuc *ram, struct ramfuc_reg *reg) in ramfuc_rd32() argument
84 struct nvkm_device *device = ram->fb->subdev.device; in ramfuc_rd32()
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| D | rammcp77.c | 35 struct mcp77_ram *ram = mcp77_ram(base); in mcp77_ram_init() local
36 struct nvkm_device *device = ram->base.fb->subdev.device; in mcp77_ram_init()
37 u32 dniso = ((ram->base.size - (ram->poller_base + 0x00)) >> 5) - 1; in mcp77_ram_init()
38 u32 hostnb = ((ram->base.size - (ram->poller_base + 0x20)) >> 5) - 1; in mcp77_ram_init()
39 u32 flush = ((ram->base.size - (ram->poller_base + 0x40)) >> 5) - 1; in mcp77_ram_init()
66 struct mcp77_ram *ram; in mcp77_ram_new() local
69 if (!(ram = kzalloc(sizeof(*ram), GFP_KERNEL))) in mcp77_ram_new()
71 *pram = &ram->base; in mcp77_ram_new()
74 size, &ram->base); in mcp77_ram_new()
78 ram->poller_base = size - rsvd_tail; in mcp77_ram_new()
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| D | ramnv40.c | 36 struct nv40_ram *ram = nv40_ram(base); in nv40_ram_calc() local
37 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv40_ram_calc()
53 ram->ctrl = 0x80000000 | (log2P << 16); in nv40_ram_calc()
54 ram->ctrl |= min(pll.bias_p + log2P, (int)pll.max_p) << 20; in nv40_ram_calc()
56 ram->ctrl |= 0x00000100; in nv40_ram_calc()
57 ram->coef = (N1 << 8) | M1; in nv40_ram_calc()
59 ram->ctrl |= 0x40000000; in nv40_ram_calc()
60 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_ram_calc()
69 struct nv40_ram *ram = nv40_ram(base); in nv40_ram_prog() local
70 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv40_ram_prog()
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| D | ramgp100.c | 31 gp100_ram_init(struct nvkm_ram *ram) in gp100_ram_init() argument
33 struct nvkm_subdev *subdev = &ram->fb->subdev; in gp100_ram_init()
92 struct nvkm_ram *ram; in gp100_ram_new() local
94 if (!(ram = *pram = kzalloc(sizeof(*ram), GFP_KERNEL))) in gp100_ram_new()
97 return gf100_ram_ctor(&gp100_ram, fb, ram); in gp100_ram_new()
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| /linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/subdev/bus/ |
| D | hwsq.h | 61 hwsq_init(struct hwsq *ram, struct nvkm_subdev *subdev) in hwsq_init() argument
65 ret = nvkm_hwsq_init(subdev, &ram->hwsq); in hwsq_init()
69 ram->sequence++; in hwsq_init()
70 ram->subdev = subdev; in hwsq_init()
75 hwsq_exec(struct hwsq *ram, bool exec) in hwsq_exec() argument
78 if (ram->subdev) { in hwsq_exec()
79 ret = nvkm_hwsq_fini(&ram->hwsq, exec); in hwsq_exec()
80 ram->subdev = NULL; in hwsq_exec()
86 hwsq_rd32(struct hwsq *ram, struct hwsq_reg *reg) in hwsq_rd32() argument
88 struct nvkm_device *device = ram->subdev->device; in hwsq_rd32()
[all …]
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| /linux-6.6.21/tools/testing/selftests/mm/ |
| D | transhuge-stress.c | 26 size_t ram, len; in main() local
37 ram = sysconf(_SC_PHYS_PAGES); in main()
38 if (ram > SIZE_MAX / psize() / 4) in main()
39 ram = SIZE_MAX / 4; in main()
41 ram *= psize(); in main()
42 len = ram; in main()
64 ram >> (20 + HPAGE_SHIFT - pshift() - 1)); in main()
79 map_len = ram >> (HPAGE_SHIFT - 1); in main()
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| /linux-6.6.21/arch/powerpc/mm/nohash/ |
| D | e500.c | 138 static unsigned long calc_cam_sz(unsigned long ram, unsigned long virt, in calc_cam_sz() argument
141 unsigned int camsize = __ilog2(ram); in calc_cam_sz()
164 unsigned long ram, int max_cam_idx, in map_mem_in_cams_addr() argument
174 boundary = ram; in map_mem_in_cams_addr()
190 for (ram -= amount_mapped; ram && i < max_cam_idx; i++) { in map_mem_in_cams_addr()
194 cam_sz = calc_cam_sz(ram, virt, phys); in map_mem_in_cams_addr()
198 ram -= cam_sz; in map_mem_in_cams_addr()
224 unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, bool dryrun, bool init) in map_mem_in_cams() argument
229 return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx, dryrun, init); in map_mem_in_cams()
268 unsigned long ram; in adjust_total_lowmem() local
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| /linux-6.6.21/Documentation/devicetree/bindings/net/ |
| D | davinci_emac.txt | 12 - ti,davinci-ctrl-ram-offset: offset to control module ram
13 - ti,davinci-ctrl-ram-size: size of control module ram
24 - ti,davinci-no-bd-ram: boolean, does EMAC have BD RAM?
35 ti,davinci-ctrl-ram-offset = <0>;
36 ti,davinci-ctrl-ram-size = <0x2000>;
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| /linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/ |
| D | nv50.c | 48 struct nvkm_memory *ram; member
61 u64 base = (nvkm_memory_addr(iobj->ram) + offset) & 0xffffff00000ULL; in nv50_instobj_wr32_slow()
62 u64 addr = (nvkm_memory_addr(iobj->ram) + offset) & 0x000000fffffULL; in nv50_instobj_wr32_slow()
80 u64 base = (nvkm_memory_addr(iobj->ram) + offset) & 0xffffff00000ULL; in nv50_instobj_rd32_slow()
81 u64 addr = (nvkm_memory_addr(iobj->ram) + offset) & 0x000000fffffULL; in nv50_instobj_rd32_slow()
186 memory = nv50_instobj(memory)->ram; in nv50_instobj_map()
282 return nvkm_memory_size(nv50_instobj(memory)->ram); in nv50_instobj_size()
288 return nvkm_memory_addr(nv50_instobj(memory)->ram); in nv50_instobj_addr()
307 return nvkm_memory_target(nv50_instobj(memory)->ram); in nv50_instobj_target()
332 nvkm_memory_unref(&iobj->ram); in nv50_instobj_dtor()
[all …]
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| /linux-6.6.21/drivers/net/ethernet/amd/ |
| D | mvme147.c | 42 unsigned long ram; member
113 lp->ram = __get_dma_pages(GFP_ATOMIC, 3); /* 32K */ in mvme147lance_probe()
114 if (!lp->ram) { in mvme147lance_probe()
122 lp->lance.init_block = (struct lance_init_block *)(lp->ram); /* CPU addr */ in mvme147lance_probe()
123 …lp->lance.lance_init_block = (struct lance_init_block *)(lp->ram); /* LANCE addr o… in mvme147lance_probe()
136 free_pages(lp->ram, 3); in mvme147lance_probe()
195 free_pages(lp->ram, 3); in m147lance_exit()
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| /linux-6.6.21/arch/arm/boot/dts/st/ |
| D | ste-db8500.dtsi | 21 ram@6000000 {
27 ram@6f00000 {
33 ram@7000000 {
47 ram@17f00000 {
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| D | ste-db8520.dtsi | 21 ram@6000000 {
27 ram@6f00000 {
33 ram@7000000 {
47 ram@17f00000 {
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| /linux-6.6.21/arch/microblaze/kernel/ |
| D | setup.c | 88 void __init machine_early_init(const char *cmdline, unsigned int ram, in machine_early_init() argument
104 romfs_base = (ram ? ram : (unsigned int)&__init_end); in machine_early_init()
131 pr_info("Ramdisk addr 0x%08x, ", ram); in machine_early_init()
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| /linux-6.6.21/arch/arm/kernel/ |
| D | tcm.c | 265 char *ram; in tcm_init() local
327 ram = &__dtcm_start; in tcm_init()
328 memcpy(start, ram, dtcm_code_sz); in tcm_init()
365 ram = &__itcm_start; in tcm_init()
366 memcpy(start, ram, itcm_code_sz); in tcm_init()
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| /linux-6.6.21/Documentation/devicetree/bindings/net/can/ |
| D | ti_hecc.txt | 9 - reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram'
11 - reg-names :"hecc", "hecc-ram", "mbx"
29 reg-names = "hecc", "hecc-ram", "mbx";
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| /linux-6.6.21/arch/parisc/ |
| D | defpalo.conf | 14 --ramdisk=ram-disk-image-file
15 --commandline=0/vmlinuz HOME=/ root=/dev/ram initrd=0/ramdisk panic_timeout=60 panic=-1
|