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Searched refs:qspi (Results 1 – 25 of 217) sorted by relevance

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/linux-6.6.21/drivers/spi/
Dspi-bcm-qspi.c255 static inline bool has_bspi(struct bcm_qspi *qspi) in has_bspi() argument
257 return qspi->bspi_mode; in has_bspi()
261 static inline bool bcm_qspi_has_fastbr(struct bcm_qspi *qspi) in bcm_qspi_has_fastbr() argument
263 if (!has_bspi(qspi) && in bcm_qspi_has_fastbr()
264 ((qspi->mspi_maj_rev >= 1) && in bcm_qspi_has_fastbr()
265 (qspi->mspi_min_rev >= 5))) in bcm_qspi_has_fastbr()
272 static inline bool bcm_qspi_has_sysclk_108(struct bcm_qspi *qspi) in bcm_qspi_has_sysclk_108() argument
274 if (!has_bspi(qspi) && (qspi->mspi_spcr3_sysclk || in bcm_qspi_has_sysclk_108()
275 ((qspi->mspi_maj_rev >= 1) && in bcm_qspi_has_sysclk_108()
276 (qspi->mspi_min_rev >= 6)))) in bcm_qspi_has_sysclk_108()
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Dspi-stm32-qspi.c131 struct stm32_qspi *qspi = (struct stm32_qspi *)dev_id; in stm32_qspi_irq() local
134 cr = readl_relaxed(qspi->io_base + QSPI_CR); in stm32_qspi_irq()
135 sr = readl_relaxed(qspi->io_base + QSPI_SR); in stm32_qspi_irq()
140 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_irq()
141 complete(&qspi->match_completion); in stm32_qspi_irq()
149 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_irq()
150 complete(&qspi->data_completion); in stm32_qspi_irq()
166 static int stm32_qspi_tx_poll(struct stm32_qspi *qspi, in stm32_qspi_tx_poll() argument
184 ret = readl_relaxed_poll_timeout_atomic(qspi->io_base + QSPI_SR, in stm32_qspi_tx_poll()
188 dev_err(qspi->dev, "fifo timeout (len:%d stat:%#x)\n", in stm32_qspi_tx_poll()
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Dspi-ti-qspi.c126 static inline unsigned long ti_qspi_read(struct ti_qspi *qspi, in ti_qspi_read() argument
129 return readl(qspi->base + reg); in ti_qspi_read()
132 static inline void ti_qspi_write(struct ti_qspi *qspi, in ti_qspi_write() argument
135 writel(val, qspi->base + reg); in ti_qspi_write()
140 struct ti_qspi *qspi = spi_master_get_devdata(spi->master); in ti_qspi_setup() local
144 dev_dbg(qspi->dev, "master busy doing other transfers\n"); in ti_qspi_setup()
148 if (!qspi->master->max_speed_hz) { in ti_qspi_setup()
149 dev_err(qspi->dev, "spi max frequency not defined\n"); in ti_qspi_setup()
153 spi->max_speed_hz = min(spi->max_speed_hz, qspi->master->max_speed_hz); in ti_qspi_setup()
155 ret = pm_runtime_resume_and_get(qspi->dev); in ti_qspi_setup()
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Dspi-microchip-core-qspi.c126 static int mchp_coreqspi_set_mode(struct mchp_coreqspi *qspi, const struct spi_mem_op *op) in mchp_coreqspi_set_mode() argument
128 u32 control = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_set_mode()
156 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_set_mode()
161 static inline void mchp_coreqspi_read_op(struct mchp_coreqspi *qspi) in mchp_coreqspi_read_op() argument
165 if (!qspi->rx_len) in mchp_coreqspi_read_op()
168 control = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_read_op()
175 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_read_op()
177 while (qspi->rx_len >= 4) { in mchp_coreqspi_read_op()
178 while (readl_relaxed(qspi->regs + REG_STATUS) & STATUS_RXFIFOEMPTY) in mchp_coreqspi_read_op()
180 data = readl_relaxed(qspi->regs + REG_X4_RX_DATA); in mchp_coreqspi_read_op()
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DMakefile35 obj-$(CONFIG_SPI_BCM_QSPI) += spi-iproc-qspi.o spi-brcmstb-qspi.o spi-bcm-qspi.o
42 obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o
60 obj-$(CONFIG_SPI_FSL_QUADSPI) += spi-fsl-qspi.o
82 obj-$(CONFIG_SPI_MICROCHIP_CORE_QSPI) += spi-microchip-core-qspi.o
101 obj-$(CONFIG_SPI_TI_QSPI) += spi-ti-qspi.o
112 obj-$(CONFIG_SPI_QCOM_QSPI) += spi-qcom-qspi.o
133 obj-$(CONFIG_SPI_STM32_QSPI) += spi-stm32-qspi.o
152 obj-$(CONFIG_SPI_ZYNQ_QSPI) += spi-zynq-qspi.o
/linux-6.6.21/Documentation/devicetree/bindings/spi/
Dfsl,spi-fsl-qspi.yaml4 $id: http://devicetree.org/schemas/spi/fsl,spi-fsl-qspi.yaml#
19 - fsl,vf610-qspi
20 - fsl,imx6sx-qspi
21 - fsl,imx7d-qspi
22 - fsl,imx6ul-qspi
23 - fsl,ls1021a-qspi
24 - fsl,ls2080a-qspi
27 - fsl,ls1043a-qspi
28 - const: fsl,ls1021a-qspi
31 - fsl,imx8mq-qspi
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Dcdns,qspi-nor.yaml4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml#
26 const: starfive,jh7110-qspi
37 enum: [ qspi, qspi-ocp, rstc_ref ]
48 enum: [ qspi, qspi-ocp ]
53 const: amd,pensando-elba-qspi
70 - amd,pensando-elba-qspi
71 - ti,k2g-qspi
73 - intel,lgm-qspi
75 - intel,socfpga-qspi
76 - starfive,jh7110-qspi
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Dbrcm,spi-bcm-qspi.yaml4 $id: http://devicetree.org/schemas/spi/brcm,spi-bcm-qspi.yaml#
36 - brcm,spi-bcm7425-qspi
37 - brcm,spi-bcm7429-qspi
38 - brcm,spi-bcm7435-qspi
39 - brcm,spi-bcm7445-qspi
40 - brcm,spi-bcm7216-qspi
41 - brcm,spi-bcm7278-qspi
42 - const: brcm,spi-bcm-qspi
47 - brcm,spi-brcmstb-qspi
49 - brcm,spi-nsp-qspi
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Drenesas,rspi.yaml31 - renesas,qspi-r8a7742 # RZ/G1H
32 - renesas,qspi-r8a7743 # RZ/G1M
33 - renesas,qspi-r8a7744 # RZ/G1N
34 - renesas,qspi-r8a7745 # RZ/G1E
35 - renesas,qspi-r8a77470 # RZ/G1C
36 - renesas,qspi-r8a7790 # R-Car H2
37 - renesas,qspi-r8a7791 # R-Car M2-W
38 - renesas,qspi-r8a7792 # R-Car V2H
39 - renesas,qspi-r8a7793 # R-Car M2-N
40 - renesas,qspi-r8a7794 # R-Car E2
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Dti_qspi.txt4 - compatible : should be "ti,dra7xxx-qspi" or "ti,am4372-qspi".
10 - interrupts: should contain the qspi interrupt number.
32 qspi: qspi@47900000 {
33 compatible = "ti,am4372-qspi";
39 ti,hwmods = "qspi";
43 qspi: qspi@4b300000 {
44 compatible = "ti,dra7xxx-qspi";
52 ti,hwmods = "qspi";
Dqcom,spi-qcom-qspi.yaml4 $id: http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#
23 - qcom,sc7180-qspi
24 - qcom,sc7280-qspi
25 - qcom,sdm845-qspi
27 - const: qcom,qspi-v1
55 - const: qspi-config
56 - const: qspi-memory
81 qspi: spi@88df000 {
82 compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
Dnvidia,tegra210-quad.yaml19 - nvidia,tegra210-qspi
20 - nvidia,tegra186-qspi
21 - nvidia,tegra194-qspi
22 - nvidia,tegra234-qspi
23 - nvidia,tegra241-qspi
33 - const: qspi
77 compatible = "nvidia,tegra210-qspi";
84 clock-names = "qspi", "qspi_out";
Dspi-zynqmp-qspi.yaml4 $id: http://devicetree.org/schemas/spi/spi-zynqmp-qspi.yaml#
18 - xlnx,versal-qspi-1.0
19 - xlnx,zynqmp-qspi-1.0
57 qspi: spi@ff0f0000 {
58 compatible = "xlnx,zynqmp-qspi-1.0";
Dst,stm32-qspi.yaml4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
18 const: st,stm32f469-qspi
27 - const: qspi
64 compatible = "st,stm32f469-qspi";
66 reg-names = "qspi", "qspi_mm";
Datmel,quadspi.yaml18 - atmel,sama5d2-qspi
19 - microchip,sam9x60-qspi
20 - microchip,sama7g5-qspi
81 compatible = "atmel,sama5d2-qspi";
Dxlnx,zynq-qspi.yaml4 $id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#
22 const: xlnx,zynq-qspi-1.0
52 compatible = "xlnx,zynq-qspi-1.0";
/linux-6.6.21/arch/arm/boot/dts/intel/socfpga/
Dsocfpga_arria10_socdk_qspi.dts9 &qspi {
28 partition@qspi-boot {
33 partition@qspi-rootfs {
Dsocfpga_arria5_socdk.dts116 &qspi {
135 partition@qspi-boot {
141 partition@qspi-rootfs {
Dsocfpga_cyclone5_socdk.dts121 &qspi {
140 partition@qspi-boot {
146 partition@qspi-rootfs {
/linux-6.6.21/arch/arm/boot/dts/renesas/
Dr8a7742-iwg21m.dtsi40 qspi-en-hog {
84 qspi_pins: qspi {
86 function = "qspi";
90 &qspi {
Dr8a7744-iwg20m.dtsi39 qspi_pins: qspi {
41 function = "qspi";
61 &qspi {
Dr8a7743-iwg20m.dtsi44 qspi_pins: qspi {
46 function = "qspi";
66 &qspi {
Dr8a7745-iwg22m.dtsi43 qspi_pins: qspi {
45 function = "qspi";
70 &qspi {
/linux-6.6.21/arch/arm64/boot/dts/xilinx/
Dzynqmp-zcu1275-revA.dts23 spi0 = &qspi;
45 &qspi {
Dzynqmp-zc1254-revA.dts23 spi0 = &qspi;
41 &qspi {

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