Home
last modified time | relevance | path

Searched refs:ptr0 (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dg84.c111 u32 flags = 0, ptr0, save; in g84_ectx_bind() local
114 case NVKM_ENGINE_GR : ptr0 = 0x0020; break; in g84_ectx_bind()
116 case NVKM_ENGINE_MSPDEC: ptr0 = 0x0040; break; in g84_ectx_bind()
118 case NVKM_ENGINE_MSPPP : ptr0 = 0x0060; break; in g84_ectx_bind()
120 case NVKM_ENGINE_MSVLD : ptr0 = 0x0080; break; in g84_ectx_bind()
122 case NVKM_ENGINE_SEC : ptr0 = 0x00a0; break; in g84_ectx_bind()
123 case NVKM_ENGINE_CE : ptr0 = 0x00c0; break; in g84_ectx_bind()
144 nvkm_wo32(chan->eng, ptr0 + 0x00, flags); in g84_ectx_bind()
145 nvkm_wo32(chan->eng, ptr0 + 0x04, lower_32_bits(limit)); in g84_ectx_bind()
146 nvkm_wo32(chan->eng, ptr0 + 0x08, lower_32_bits(start)); in g84_ectx_bind()
[all …]
Dnv50.c155 u32 flags = 0, ptr0, save; in nv50_ectx_bind() local
158 case NVKM_ENGINE_GR : ptr0 = 0x0000; break; in nv50_ectx_bind()
159 case NVKM_ENGINE_MPEG : ptr0 = 0x0060; break; in nv50_ectx_bind()
194 nvkm_wo32(chan->eng, ptr0 + 0x00, flags); in nv50_ectx_bind()
195 nvkm_wo32(chan->eng, ptr0 + 0x04, lower_32_bits(limit)); in nv50_ectx_bind()
196 nvkm_wo32(chan->eng, ptr0 + 0x08, lower_32_bits(start)); in nv50_ectx_bind()
197 nvkm_wo32(chan->eng, ptr0 + 0x0c, upper_32_bits(limit) << 24 | in nv50_ectx_bind()
199 nvkm_wo32(chan->eng, ptr0 + 0x10, 0x00000000); in nv50_ectx_bind()
200 nvkm_wo32(chan->eng, ptr0 + 0x14, 0x00000000); in nv50_ectx_bind()
Dgk104.c136 u32 ptr0, ptr1 = 0; in gk104_ectx_bind() local
141 case NVKM_ENGINE_GR : ptr0 = 0x0210; break; in gk104_ectx_bind()
142 case NVKM_ENGINE_SEC : ptr0 = 0x0220; break; in gk104_ectx_bind()
143 case NVKM_ENGINE_MSPDEC: ptr0 = 0x0250; break; in gk104_ectx_bind()
144 case NVKM_ENGINE_MSPPP : ptr0 = 0x0260; break; in gk104_ectx_bind()
145 case NVKM_ENGINE_MSVLD : ptr0 = 0x0270; break; in gk104_ectx_bind()
146 case NVKM_ENGINE_VIC : ptr0 = 0x0280; break; in gk104_ectx_bind()
147 case NVKM_ENGINE_MSENC : ptr0 = 0x0290; break; in gk104_ectx_bind()
150 ptr0 = 0x0210; in gk104_ectx_bind()
155 ptr0 = 0x0210; in gk104_ectx_bind()
[all …]
Dgf100.c164 u32 ptr0; in gf100_ectx_bind() local
168 case NVKM_ENGINE_GR : ptr0 = 0x0210; break; in gf100_ectx_bind()
169 case NVKM_ENGINE_CE : ptr0 = 0x0230 + (engn->engine->subdev.inst * 0x10); break; in gf100_ectx_bind()
170 case NVKM_ENGINE_MSPDEC: ptr0 = 0x0250; break; in gf100_ectx_bind()
171 case NVKM_ENGINE_MSPPP : ptr0 = 0x0260; break; in gf100_ectx_bind()
172 case NVKM_ENGINE_MSVLD : ptr0 = 0x0270; break; in gf100_ectx_bind()
184 nvkm_wo32(chan->inst, ptr0 + 0, lower_32_bits(addr)); in gf100_ectx_bind()
185 nvkm_wo32(chan->inst, ptr0 + 4, upper_32_bits(addr)); in gf100_ectx_bind()
/linux-6.6.21/arch/ia64/lib/
Dmemset.S31 #define ptr0 r29 macro
155 add ptr0 = 16, ptr2 // Two stores in parallel
161 stf8 [ptr0] = fvalue, 8
165 stf8 [ptr0] = fvalue, 24
169 stf8 [ptr0] = fvalue, 8
173 stf8 [ptr0] = fvalue, 24
177 stf8 [ptr0] = fvalue, 8
181 stf8 [ptr0] = fvalue, 24
185 stf8 [ptr0] = fvalue, 32
225 add ptr0 = 16, ptr2 // Two stores in parallel
[all …]
/linux-6.6.21/tools/testing/radix-tree/
Dregression3.c32 void *ptr0 = (void *)4ul; in regression3_test() local
40 radix_tree_insert(&root, 0, ptr0); in regression3_test()
/linux-6.6.21/drivers/crypto/cavium/cpt/
Drequest_manager.h84 __be64 ptr0; member
Dcptvf_reqmanager.c80 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components()
100 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components()
/linux-6.6.21/drivers/crypto/marvell/octeontx2/
Dotx2_cpt_reqmgr.h154 __be64 ptr0; member
Dotx2_cptvf_reqmgr.c119 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components()
138 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components()
/linux-6.6.21/drivers/crypto/marvell/octeontx/
Dotx_cptvf_reqmgr.h132 __be64 ptr0; member
Dotx_cptvf_reqmgr.c131 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components()
150 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components()