Searched refs:psr_context (Results 1 – 11 of 11) sorted by relevance
170 struct psr_context *psr_context) in dce_dmcu_setup_psr() argument182 psr_context->psrExitLinkTrainingRequired); in dce_dmcu_setup_psr()192 switch (psr_context->controllerId) { in dce_dmcu_setup_psr()230 psr_context->sdpTransmitLineNumDeadline); in dce_dmcu_setup_psr()239 masterCmdData1.bits.timehyst_frames = psr_context->timehyst_frames; in dce_dmcu_setup_psr()240 masterCmdData1.bits.hyst_lines = psr_context->hyst_lines; in dce_dmcu_setup_psr()242 psr_context->rfb_update_auto_en; in dce_dmcu_setup_psr()243 masterCmdData1.bits.dp_port_num = psr_context->transmitterId; in dce_dmcu_setup_psr()244 masterCmdData1.bits.dcp_sel = psr_context->controllerId; in dce_dmcu_setup_psr()245 masterCmdData1.bits.phy_type = psr_context->phyType; in dce_dmcu_setup_psr()[all …]
296 struct psr_context *psr_context, in dmub_psr_copy_settings() argument326 psr_context->psrExitLinkTrainingRequired); in dmub_psr_copy_settings()330 psr_context->sdpTransmitLineNumDeadline); in dmub_psr_copy_settings()338 copy_settings_data->dpphy_inst = psr_context->transmitterId; in dmub_psr_copy_settings()339 copy_settings_data->aux_inst = psr_context->channel; in dmub_psr_copy_settings()340 copy_settings_data->digfe_inst = psr_context->engineId; in dmub_psr_copy_settings()341 copy_settings_data->digbe_inst = psr_context->transmitterId; in dmub_psr_copy_settings()360 copy_settings_data->psr_level = psr_context->psr_level.u32all; in dmub_psr_copy_settings()361 copy_settings_data->smu_optimizations_en = psr_context->allow_smu_optimizations; in dmub_psr_copy_settings()362 copy_settings_data->multi_disp_optimizations_en = psr_context->allow_multi_disp_optimizations; in dmub_psr_copy_settings()[all …]
40 struct psr_context *psr_context, uint8_t panel_inst);
649 struct psr_context *psr_context) in edp_setup_psr() argument660 psr_context->controllerId = CONTROLLER_ID_UNDEFINED; in edp_setup_psr()714 psr_context->su_granularity_required = in edp_setup_psr()716 psr_context->su_y_granularity = in edp_setup_psr()718 psr_context->line_time_in_us = psr_config->line_time_in_us; in edp_setup_psr()724 psr_context->rate_control_caps = psr_config->rate_control_caps; in edp_setup_psr()731 psr_context->channel = link->ddc->ddc_pin->hw_info.ddc_channel; in edp_setup_psr()732 psr_context->transmitterId = link->link_enc->transmitter; in edp_setup_psr()733 psr_context->engineId = link->link_enc->preferred_engine; in edp_setup_psr()741 psr_context->controllerId = in edp_setup_psr()[all …]
51 struct psr_context *psr_context);
106 struct psr_context psr_context = {0}; in amdgpu_dm_link_setup_psr() local129 ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context); in amdgpu_dm_link_setup_psr()
68 struct psr_context *psr_context);
465 struct psr_context *psr_context) in dc_link_setup_psr() argument467 return link->dc->link_srv->edp_setup_psr(link, stream, psr_config, psr_context); in dc_link_setup_psr()
269 struct psr_context *psr_context);
667 struct psr_context { struct
2022 struct psr_context *psr_context);