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Searched refs:pre_div (Results 1 – 25 of 47) sorted by relevance

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/linux-6.6.21/drivers/clk/sunxi/
Dclk-sun9i-cpus.c75 u8 div, pre_div = 1; in sun9i_a80_cpus_clk_round() local
90 pre_div = div; in sun9i_a80_cpus_clk_round()
93 pre_div = DIV_ROUND_UP(div, 2); in sun9i_a80_cpus_clk_round()
96 pre_div = DIV_ROUND_UP(div, 3); in sun9i_a80_cpus_clk_round()
99 pre_div = DIV_ROUND_UP(div, 4); in sun9i_a80_cpus_clk_round()
107 *pre_divp = pre_div - 1; in sun9i_a80_cpus_clk_round()
110 return parent_rate / pre_div / div; in sun9i_a80_cpus_clk_round()
157 u8 div, pre_div, parent; in sun9i_a80_cpus_clk_set_rate() local
166 sun9i_a80_cpus_clk_round(rate, &div, &pre_div, parent, parent_rate); in sun9i_a80_cpus_clk_set_rate()
169 reg = SUN9I_CPUS_PLL4_DIV_SET(reg, pre_div); in sun9i_a80_cpus_clk_set_rate()
/linux-6.6.21/drivers/gpu/drm/sun4i/
Dsun4i_hdmi_ddc_clk.c18 u8 pre_div; member
29 const u8 pre_div, in sun4i_ddc_calc_divider() argument
40 tmp_rate = (((parent_rate / pre_div) / 10) >> _n) / in sun4i_ddc_calc_divider()
67 return sun4i_ddc_calc_divider(rate, *prate, ddc->pre_div, in sun4i_ddc_round_rate()
82 return (((parent_rate / ddc->pre_div) / 10) >> n) / in sun4i_ddc_recalc_rate()
92 sun4i_ddc_calc_divider(rate, parent_rate, ddc->pre_div, in sun4i_ddc_set_rate()
134 ddc->pre_div = hdmi->variant->ddc_clk_pre_divider; in sun4i_ddc_create()
/linux-6.6.21/drivers/clk/bcm/
Dclk-kona-setup.c64 div = &peri->pre_div; in clk_requires_trigger()
130 div = &peri->pre_div; in peri_clk_data_offsets_valid()
364 struct bcm_clk_div *pre_div; in kona_dividers_valid() local
369 if (!divider_exists(&peri->div) || !divider_exists(&peri->pre_div)) in kona_dividers_valid()
373 pre_div = &peri->pre_div; in kona_dividers_valid()
374 if (divider_is_fixed(div) || divider_is_fixed(pre_div)) in kona_dividers_valid()
379 return div->u.s.frac_width + pre_div->u.s.frac_width <= limit; in kona_dividers_valid()
400 struct bcm_clk_div *pre_div; in peri_clk_data_valid() local
442 pre_div = &peri->pre_div; in peri_clk_data_valid()
447 if (divider_exists(pre_div)) in peri_clk_data_valid()
[all …]
Dclk-kona.c686 struct bcm_clk_div *div, struct bcm_clk_div *pre_div, in clk_recalc_rate() argument
708 if (pre_div && divider_exists(pre_div)) { in clk_recalc_rate()
711 scaled_rate = scale_rate(pre_div, parent_rate); in clk_recalc_rate()
713 scaled_div = divider_read_scaled(ccu, pre_div); in clk_recalc_rate()
741 struct bcm_clk_div *pre_div, in round_rate() argument
766 if (divider_exists(pre_div)) { in round_rate()
770 scaled_rate = scale_rate(pre_div, parent_rate); in round_rate()
772 scaled_pre_div = divider_read_scaled(ccu, pre_div); in round_rate()
996 return clk_recalc_rate(bcm_clk->ccu, &data->div, &data->pre_div, in kona_peri_clk_recalc_rate()
1010 return round_rate(bcm_clk->ccu, div, &bcm_clk->u.peri->pre_div, in kona_peri_clk_round_rate()
[all …]
/linux-6.6.21/drivers/clk/qcom/
Dclk-rcg.c113 static u32 ns_to_pre_div(struct pre_div *p, u32 ns) in ns_to_pre_div()
120 static u32 pre_div_to_ns(struct pre_div *p, u8 pre_div, u32 ns) in pre_div_to_ns() argument
128 ns |= pre_div << p->pre_div_shift; in pre_div_to_ns()
203 struct pre_div *p; in configure_bank()
267 ns = pre_div_to_ns(p, f->pre_div - 1, ns); in configure_bank()
312 f.pre_div = ns_to_pre_div(&rcg->p[bank], ns) + 1; in clk_dyn_rcg_set_parent()
326 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 pre_div) in calc_rate() argument
328 if (pre_div) in calc_rate()
329 rate /= pre_div + 1; in calc_rate()
345 u32 pre_div, m = 0, n = 0, ns, md, mode = 0; in clk_rcg_recalc_rate() local
[all …]
Dclk-rcg.h15 u8 pre_div; member
47 struct pre_div { struct
80 struct pre_div p;
119 struct pre_div p[2];
Dclk-rcg2.c240 if (f->pre_div) { in _freq_tbl_determine_rate()
244 rate *= f->pre_div + 1; in _freq_tbl_determine_rate()
318 cfg = f->pre_div << CFG_SRC_DIV_SHIFT; in __clk_rcg2_configure()
569 f.pre_div = hid_div; in clk_edp_pixel_set_rate()
570 f.pre_div >>= CFG_SRC_DIV_SHIFT; in clk_edp_pixel_set_rate()
571 f.pre_div &= mask; in clk_edp_pixel_set_rate()
677 f.pre_div = div; in clk_byte_set_rate()
736 f.pre_div = div; in clk_byte2_set_rate()
833 f.pre_div = hid_div; in clk_pixel_set_rate()
834 f.pre_div >>= CFG_SRC_DIV_SHIFT; in clk_pixel_set_rate()
[all …]
Dgcc-ipq4019.c164 f->pre_div << pll->cdiv.shift); in clk_cpu_div_set_rate()
185 u32 cdiv, pre_div; in clk_cpu_div_recalc_rate() local
197 pre_div = (cdiv + 1) * 2; in clk_cpu_div_recalc_rate()
199 pre_div = cdiv + 12; in clk_cpu_div_recalc_rate()
202 do_div(rate, pre_div); in clk_cpu_div_recalc_rate()
262 u32 cdiv, pre_div = 1; in clk_regmap_clk_div_recalc_rate() local
267 pre_div = pll->fixed_div; in clk_regmap_clk_div_recalc_rate()
274 pre_div = clkt->div; in clk_regmap_clk_div_recalc_rate()
279 do_div(rate, pre_div); in clk_regmap_clk_div_recalc_rate()
/linux-6.6.21/drivers/phy/mediatek/
Dphy-mtk-hdmi-mt8173.c140 unsigned int pre_div; in mtk_hdmi_pll_set_rate() local
150 pre_div = 0; in mtk_hdmi_pll_set_rate()
153 pre_div = 1; in mtk_hdmi_pll_set_rate()
156 pre_div = 1; in mtk_hdmi_pll_set_rate()
160 mtk_phy_update_field(base + HDMI_CON0, RG_HDMITX_PLL_PREDIV, pre_div); in mtk_hdmi_pll_set_rate()
/linux-6.6.21/drivers/clk/
Dclk-sparx5.c53 u8 pre_div; member
65 int divt = sel_rates[conf->rot_sel] * (1 + conf->pre_div); in s5_calc_freq()
91 conf->pre_div = i; in s5_search_fractional()
183 val |= FIELD_PREP(PLL_PRE_DIV, conf.pre_div); in s5_pll_set_rate()
203 conf.pre_div = FIELD_GET(PLL_PRE_DIV, val); in s5_pll_recalc_rate()
/linux-6.6.21/sound/soc/codecs/
Drt1016.c309 int pre_div, bclk_ms, frame_size; in rt1016_hw_params() local
313 pre_div = rl6231_get_clk_info(rt1016->sysclk, rt1016->lrck); in rt1016_hw_params()
314 if (pre_div < 0) { in rt1016_hw_params()
334 rt1016->lrck, pre_div, dai->id); in rt1016_hw_params()
357 ((pre_div + 3) << RT1016_FS_PD_SFT) | in rt1016_hw_params()
358 (pre_div << RT1016_OSR_PD_SFT)); in rt1016_hw_params()
Drt1019.c161 int pre_div, bclk_ms, frame_size; in rt1019_hw_params() local
167 pre_div = rl6231_get_clk_info(rt1019->sysclk, rt1019->lrck); in rt1019_hw_params()
168 if (pre_div < 0) { in rt1019_hw_params()
185 bclk_ms, pre_div, dai->id); in rt1019_hw_params()
187 switch (pre_div) { in rt1019_hw_params()
Drt1308.c457 int pre_div, bclk_ms, frame_size; in rt1308_hw_params() local
460 pre_div = rt1308_get_clk_info(rt1308->sysclk, rt1308->lrck); in rt1308_hw_params()
461 if (pre_div < 0) { in rt1308_hw_params()
478 bclk_ms, pre_div, dai->id); in rt1308_hw_params()
481 rt1308->lrck, pre_div, dai->id); in rt1308_hw_params()
503 val_clk = pre_div << RT1308_DIV_FS_SYS_SFT; in rt1308_hw_params()
Drt1015.c691 int pre_div, frame_size, lrck; in rt1015_hw_params() local
695 pre_div = rl6231_get_clk_info(rt1015->sysclk, lrck); in rt1015_hw_params()
696 if (pre_div < 0) { in rt1015_hw_params()
708 dev_dbg(component->dev, "pre_div is %d for iis %d\n", pre_div, dai->id); in rt1015_hw_params()
711 lrck, pre_div, dai->id); in rt1015_hw_params()
732 RT1015_FS_PD_MASK, pre_div << RT1015_FS_PD_SFT); in rt1015_hw_params()
Drt1305.c629 int pre_div, bclk_ms, frame_size; in rt1305_hw_params() local
632 pre_div = rt1305_get_clk_info(rt1305->sysclk, rt1305->lrck); in rt1305_hw_params()
633 if (pre_div < 0) { in rt1305_hw_params()
639 pre_div = 0; in rt1305_hw_params()
652 bclk_ms, pre_div, dai->id); in rt1305_hw_params()
655 rt1305->lrck, pre_div, dai->id); in rt1305_hw_params()
677 val_clk = pre_div << RT1305_DIV_FS_SYS_SFT; in rt1305_hw_params()
Dwm8510.c266 unsigned int pre_div:4; /* prescale - 1 */ member
285 pll_div.pre_div = 1; in pll_factors()
288 pll_div.pre_div = 0; in pll_factors()
332 snd_soc_component_write(component, WM8510_PLLN, (pll_div.pre_div << 4) | pll_div.n); in wm8510_set_dai_pll()
Dwm8974.c263 unsigned int pre_div:1; member
284 pll_div->pre_div = 1; in pll_factors()
287 pll_div->pre_div = 0; in pll_factors()
332 snd_soc_component_write(component, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n); in wm8974_set_dai_pll()
Drt5514.c755 int pre_div, bclk_ms, frame_size; in rt5514_hw_params() local
759 pre_div = rl6231_get_clk_info(rt5514->sysclk, rt5514->lrck); in rt5514_hw_params()
760 if (pre_div < 0) { in rt5514_hw_params()
777 bclk_ms, pre_div, dai->id); in rt5514_hw_params()
799 (pre_div + 1) << RT5514_CLK_AD_ANA1_SEL_SFT); in rt5514_hw_params()
802 pre_div << RT5514_CLK_SYS_DIV_OUT_SFT | in rt5514_hw_params()
803 pre_div << RT5514_SEL_ADC_OSR_SFT); in rt5514_hw_params()
Drt5660.c839 int pre_div, bclk_ms, frame_size; in rt5660_hw_params() local
842 pre_div = rl6231_get_clk_info(rt5660->sysclk, rt5660->lrck[dai->id]); in rt5660_hw_params()
843 if (pre_div < 0) { in rt5660_hw_params()
865 bclk_ms, pre_div, dai->id); in rt5660_hw_params()
887 pre_div << RT5660_I2S_PD1_SFT; in rt5660_hw_params()
/linux-6.6.21/drivers/mmc/host/
Dsdhci-of-esdhc.c653 unsigned int pre_div = 1, div = 1; in esdhc_of_set_clock() local
666 pre_div = 2; in esdhc_of_set_clock()
679 while (host->max_clk / pre_div / 16 > clock_fixup && pre_div < 256) in esdhc_of_set_clock()
680 pre_div *= 2; in esdhc_of_set_clock()
682 while (host->max_clk / pre_div / div > clock_fixup && div < 16) in esdhc_of_set_clock()
685 esdhc->div_ratio = pre_div * div; in esdhc_of_set_clock()
693 pre_div = 4; in esdhc_of_set_clock()
696 pre_div = 4; in esdhc_of_set_clock()
699 pre_div = 4; in esdhc_of_set_clock()
705 esdhc->div_ratio = pre_div * div; in esdhc_of_set_clock()
[all …]
/linux-6.6.21/drivers/rtc/
Drtc-ac100.c226 int div = 0, pre_div = 0; in ac100_clkout_set_rate() local
229 div = divider_get_val(rate * ac100_clkout_prediv[pre_div].div, in ac100_clkout_set_rate()
235 ac100_clkout_prediv[++pre_div].div); in ac100_clkout_set_rate()
240 pre_div = ac100_clkout_prediv[pre_div].val; in ac100_clkout_set_rate()
246 (pre_div - 1) << AC100_CLKOUT_PRE_DIV_SHIFT); in ac100_clkout_set_rate()
/linux-6.6.21/drivers/media/i2c/
Dov7251.c89 unsigned int pre_div; member
97 unsigned int pre_div; member
170 .pre_div = 0x03,
178 .pre_div = 0x01,
186 .pre_div = 0x03,
194 .pre_div = 0x05,
202 .pre_div = 0x04,
210 .pre_div = 0x04,
816 configs->pll1[ov7251->link_freq_idx]->pre_div); in ov7251_pll_configure()
840 configs->pll2->pre_div); in ov7251_pll_configure()
Dccs-pll.c384 u32 pre_mul, pre_div; in ccs_pll_calculate_vt_tree() local
386 pre_div = gcd(pll->pixel_rate_csi, in ccs_pll_calculate_vt_tree()
388 pre_mul = pll->pixel_rate_csi / pre_div; in ccs_pll_calculate_vt_tree()
389 pre_div = pll->ext_clk_freq_hz * pll->vt_lanes / pre_div; in ccs_pll_calculate_vt_tree()
412 div = gcd(pre_mul * pll_fr->pre_pll_clk_div, pre_div); in ccs_pll_calculate_vt_tree()
414 div = pre_div / div; in ccs_pll_calculate_vt_tree()
/linux-6.6.21/drivers/gpu/drm/bridge/
Dti-sn65dsi86.c1411 unsigned int pre_div; in ti_sn_pwm_apply() local
1490 pre_div = DIV64_U64_ROUND_UP(period * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1492 scale = div64_u64(period * pdata->pwm_refclk_freq, (u64)NSEC_PER_SEC * pre_div) - 1; in ti_sn_pwm_apply()
1506 (u64)NSEC_PER_SEC * pre_div); in ti_sn_pwm_apply()
1510 ret = regmap_write(pdata->regmap, SN_PWM_PRE_DIV_REG, pre_div); in ti_sn_pwm_apply()
1542 unsigned int pre_div; in ti_sn_pwm_get_state() local
1559 ret = regmap_read(pdata->regmap, SN_PWM_PRE_DIV_REG, &pre_div); in ti_sn_pwm_get_state()
1569 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * (scale + 1), in ti_sn_pwm_get_state()
1571 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * backlight, in ti_sn_pwm_get_state()
/linux-6.6.21/drivers/iio/adc/
Dimx7d_adc.c126 u32 pre_div; member
131 .pre_div = (_pre_div), \
208 info->pre_div_num = adc_analogure_clk.pre_div; in imx7d_adc_sample_rate_set()

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