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Searched refs:post_div_val (Results 1 – 20 of 20) sorted by relevance

/linux-6.6.21/drivers/clk/qcom/ !
Dclk-pll.h69 u32 post_div_val; member
Dclk-cbf-8996.c63 .post_div_val = 0x1 << 8,
316 cbfpll_config.post_div_val = 0x3 << 8; in qcom_msm8996_cbf_probe()
Dclk-alpha-pll.h139 u32 post_div_val; member
Dclk-cpu-8996.c122 .post_div_val = 0x1 << 8,
224 .post_div_val = 0x1 << 8,
Dlcc-ipq806x.c52 .post_div_val = 0x0,
Dclk-pll.c230 val |= config->post_div_val; in clk_pll_configure()
Dclk-alpha-pll.c372 val |= config->post_div_val; in clk_alpha_pll_configure()
1181 val = config->post_div_val; in clk_fabia_pll_configure()
2392 val |= config->post_div_val; in clk_stromer_pll_configure()
Dmmcc-msm8974.c2346 .post_div_val = 0x0,
2360 .post_div_val = 0x0,
Dgcc-qcm2290.c309 .post_div_val = 0x1 << 8,
360 .post_div_val = 0x1 << 8,
Dmmcc-apq8084.c2799 .post_div_val = 0x0,
2813 .post_div_val = 0x0,
Dgcc-sm6115.c367 .post_div_val = 0x1 << 8,
419 .post_div_val = 0x1 << 8,
Dgcc-msm8939.c216 .post_div_val = 0x0,
263 .post_div_val = 0x0,
Dcamcc-sm6350.c147 .post_div_val = 0x3 << 8,
Dgcc-ipq6018.c4152 .post_div_val = 0x0,
4167 .post_div_val = 0x1 << 8,
Dgcc-ipq8074.c4274 .post_div_val = 0x0,
4286 .post_div_val = 0x1 << 8,
Dgcc-qcs404.c137 .post_div_val = 0x1 << 8,
Dmmcc-msm8960.c88 .post_div_val = 0x0,
Dgcc-msm8917.c110 .post_div_val = BIT(8),
Dgcc-msm8976.c165 .post_div_val = 0x0,
Dgcc-msm8953.c121 .post_div_val = BIT(8),