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Searched refs:phyclk (Results 1 – 25 of 26) sorted by relevance

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/linux-6.6.21/arch/arm/mach-s3c/
Dsetup-usb-phy-s3c64xx.c26 u32 phyclk; in s3c_usb_otgphy_init() local
31 phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK; in s3c_usb_otgphy_init()
37 phyclk |= S3C_PHYCLK_CLKSEL_12M; in s3c_usb_otgphy_init()
40 phyclk |= S3C_PHYCLK_CLKSEL_24M; in s3c_usb_otgphy_init()
51 writel(phyclk | S3C_PHYCLK_CLK_FORCE, S3C_PHYCLK); in s3c_usb_otgphy_init()
/linux-6.6.21/drivers/phy/samsung/
Dphy-exynos5250-sata.c50 struct clk *phyclk; member
196 sata_phy->phyclk = devm_clk_get(dev, "sata_phyctrl"); in exynos_sata_phy_probe()
197 if (IS_ERR(sata_phy->phyclk)) { in exynos_sata_phy_probe()
199 ret = PTR_ERR(sata_phy->phyclk); in exynos_sata_phy_probe()
203 ret = clk_prepare_enable(sata_phy->phyclk); in exynos_sata_phy_probe()
228 clk_disable_unprepare(sata_phy->phyclk); in exynos_sata_phy_probe()
/linux-6.6.21/drivers/net/wireless/ath/ath10k/
Dhw.c600 u32 phyclk; in ath10k_hw_qca988x_set_coverage_class() local
625 phyclk = MS(phyclk_reg, WAVE1_PHYCLK_USEC) + 1; in ath10k_hw_qca988x_set_coverage_class()
651 if (slottime_reg % phyclk) { in ath10k_hw_qca988x_set_coverage_class()
659 slottime = slottime / phyclk; in ath10k_hw_qca988x_set_coverage_class()
673 slottime += value * 3 * phyclk; in ath10k_hw_qca988x_set_coverage_class()
680 ack_timeout += 3 * value * phyclk; in ath10k_hw_qca988x_set_coverage_class()
686 cts_timeout += 3 * value * phyclk; in ath10k_hw_qca988x_set_coverage_class()
/linux-6.6.21/drivers/phy/rockchip/
Dphy-rockchip-inno-hdmi.c245 struct clk *phyclk; member
638 ret = clk_prepare_enable(inno->phyclk); in inno_hdmi_phy_power_on()
644 clk_disable_unprepare(inno->phyclk); in inno_hdmi_phy_power_on()
660 clk_disable_unprepare(inno->phyclk); in inno_hdmi_phy_power_off()
1017 inno->phyclk = devm_clk_register(dev, &inno->hw); in inno_hdmi_phy_clk_register()
1018 if (IS_ERR(inno->phyclk)) { in inno_hdmi_phy_clk_register()
1019 ret = PTR_ERR(inno->phyclk); in inno_hdmi_phy_clk_register()
1024 ret = of_clk_add_provider(np, of_clk_src_simple_get, inno->phyclk); in inno_hdmi_phy_clk_register()
/linux-6.6.21/Documentation/devicetree/bindings/phy/
Drockchip,inno-usb2phy.yaml40 const: phyclk
186 clock-names = "phyclk";
Drockchip-usb-phy.yaml47 const: phyclk
/linux-6.6.21/Documentation/devicetree/bindings/usb/
Dsamsung,exynos-dwc3.yaml86 - const: phyclk
/linux-6.6.21/Documentation/devicetree/bindings/net/
Dsti-dwmac.txt20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
/linux-6.6.21/Documentation/devicetree/bindings/clock/st/
Dst,flexgen.txt128 "clk-eth-ref-phyclk",
/linux-6.6.21/Documentation/devicetree/bindings/soc/rockchip/
Dgrf.yaml273 clock-names = "phyclk";
/linux-6.6.21/arch/arm/boot/dts/st/
Dstih407-pinctrl.dtsi218 phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>;
260 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
281 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
287 phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;
/linux-6.6.21/arch/arm/boot/dts/rockchip/
Drk3188.dtsi658 clock-names = "phyclk";
666 clock-names = "phyclk";
Drk3066a.dtsi693 clock-names = "phyclk";
701 clock-names = "phyclk";
Drk3288.dtsi909 clock-names = "phyclk";
919 clock-names = "phyclk";
929 clock-names = "phyclk";
Drk322x.dtsi256 clock-names = "phyclk";
283 clock-names = "phyclk";
Drk3128.dtsi209 clock-names = "phyclk";
Drv1108.dtsi270 clock-names = "phyclk";
/linux-6.6.21/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dmain.h366 bool phyclk; /* phy is out of reset and has clock */ member
/linux-6.6.21/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi1750 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
1803 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
/linux-6.6.21/arch/arm64/boot/dts/rockchip/
Drk356x.dtsi1769 clock-names = "phyclk";
1791 clock-names = "phyclk";
Drk3588s.dtsi479 clock-names = "phyclk";
504 clock-names = "phyclk";
Drk3399.dtsi1556 clock-names = "phyclk";
1583 clock-names = "phyclk";
Drk3308.dtsi194 clock-names = "phyclk";
Drk3328.dtsi841 clock-names = "phyclk";
Dpx30.dtsi878 clock-names = "phyclk";

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