Searched refs:od_table (Results 1 – 6 of 6) sorted by relevance
/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
D | smu_v13_0_7_ppt.c | 1095 OverDriveTableExternal_t *od_table) in smu_v13_0_7_dump_od_table() argument 1099 dev_dbg(adev->dev, "OD: Gfxclk: (%d, %d)\n", od_table->OverDriveTable.GfxclkFmin, in smu_v13_0_7_dump_od_table() 1100 od_table->OverDriveTable.GfxclkFmax); in smu_v13_0_7_dump_od_table() 1101 dev_dbg(adev->dev, "OD: Uclk: (%d, %d)\n", od_table->OverDriveTable.UclkFmin, in smu_v13_0_7_dump_od_table() 1102 od_table->OverDriveTable.UclkFmax); in smu_v13_0_7_dump_od_table() 1106 OverDriveTableExternal_t *od_table) in smu_v13_0_7_get_overdrive_table() argument 1113 (void *)od_table, in smu_v13_0_7_get_overdrive_table() 1122 OverDriveTableExternal_t *od_table) in smu_v13_0_7_upload_overdrive_table() argument 1129 (void *)od_table, in smu_v13_0_7_upload_overdrive_table() 1143 OverDriveTableExternal_t *od_table = in smu_v13_0_7_print_clk_levels() local [all …]
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D | smu_v13_0_0_ppt.c | 1114 OverDriveTableExternal_t *od_table) in smu_v13_0_0_dump_od_table() argument 1118 dev_dbg(adev->dev, "OD: Gfxclk: (%d, %d)\n", od_table->OverDriveTable.GfxclkFmin, in smu_v13_0_0_dump_od_table() 1119 od_table->OverDriveTable.GfxclkFmax); in smu_v13_0_0_dump_od_table() 1120 dev_dbg(adev->dev, "OD: Uclk: (%d, %d)\n", od_table->OverDriveTable.UclkFmin, in smu_v13_0_0_dump_od_table() 1121 od_table->OverDriveTable.UclkFmax); in smu_v13_0_0_dump_od_table() 1125 OverDriveTableExternal_t *od_table) in smu_v13_0_0_get_overdrive_table() argument 1132 (void *)od_table, in smu_v13_0_0_get_overdrive_table() 1141 OverDriveTableExternal_t *od_table) in smu_v13_0_0_upload_overdrive_table() argument 1148 (void *)od_table, in smu_v13_0_0_upload_overdrive_table() 1162 OverDriveTableExternal_t *od_table = in smu_v13_0_0_print_clk_levels() local [all …]
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/linux-6.6.21/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
D | navi10_ppt.c | 1240 static inline bool navi10_od_feature_is_supported(struct smu_11_0_overdrive_table *od_table, enum S… in navi10_od_feature_is_supported() argument 1242 return od_table->cap[cap]; in navi10_od_feature_is_supported() 1245 static void navi10_od_setting_get_range(struct smu_11_0_overdrive_table *od_table, in navi10_od_setting_get_range() argument 1250 *min = od_table->min[setting]; in navi10_od_setting_get_range() 1252 *max = od_table->max[setting]; in navi10_od_setting_get_range() 1270 OverDriveTable_t *od_table = in navi10_emit_clk_levels() local 1357 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels() 1362 od_table->GfxclkFmin, od_table->GfxclkFmax); in navi10_emit_clk_levels() 1365 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels() 1369 *offset += sysfs_emit_at(buf, *offset, "OD_MCLK:\n1: %uMHz\n", od_table->UclkFmax); in navi10_emit_clk_levels() [all …]
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D | sienna_cichlid_ppt.c | 1244 static bool sienna_cichlid_is_od_feature_supported(struct smu_11_0_7_overdrive_table *od_table, in sienna_cichlid_is_od_feature_supported() argument 1247 return od_table->cap[cap]; in sienna_cichlid_is_od_feature_supported() 1250 static void sienna_cichlid_get_od_setting_range(struct smu_11_0_7_overdrive_table *od_table, in sienna_cichlid_get_od_setting_range() argument 1255 *min = od_table->min[setting]; in sienna_cichlid_get_od_setting_range() 1257 *max = od_table->max[setting]; in sienna_cichlid_get_od_setting_range() 1270 OverDriveTable_t *od_table = in sienna_cichlid_print_clk_levels() local 1358 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels() 1365 …size += sysfs_emit_at(buf, size, "0: %uMhz\n1: %uMhz\n", od_table->GfxclkFmin, od_table->GfxclkFma… in sienna_cichlid_print_clk_levels() 1369 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels() 1376 size += sysfs_emit_at(buf, size, "0: %uMhz\n1: %uMHz\n", od_table->UclkFmin, od_table->UclkFmax); in sienna_cichlid_print_clk_levels() [all …]
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/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | vega20_hwmgr.c | 1243 OverDriveTable_t *od_table = &(data->smc_state_table.overdrive_table); in vega20_od8_initialize_default_settings() local 1253 ret = smum_smc_table_manager(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE, true); in vega20_od8_initialize_default_settings() 1260 od_table->GfxclkFmin; in vega20_od8_initialize_default_settings() 1262 od_table->GfxclkFmax; in vega20_od8_initialize_default_settings() 1271 od_table->GfxclkFreq1 = od_table->GfxclkFmin; in vega20_od8_initialize_default_settings() 1273 od_table->GfxclkFreq1; in vega20_od8_initialize_default_settings() 1275 od_table->GfxclkFreq3 = od_table->GfxclkFmax; in vega20_od8_initialize_default_settings() 1277 od_table->GfxclkFreq3; in vega20_od8_initialize_default_settings() 1279 od_table->GfxclkFreq2 = (od_table->GfxclkFreq1 + od_table->GfxclkFreq3) / 2; in vega20_od8_initialize_default_settings() 1281 od_table->GfxclkFreq2; in vega20_od8_initialize_default_settings() [all …]
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D | vega10_hwmgr.c | 312 struct phm_ppt_v1_clock_voltage_dependency_table *od_table[3]; in vega10_odn_initial_default_setting() local 334 od_table[0] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_sclk; in vega10_odn_initial_default_setting() 335 od_table[1] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_mclk; in vega10_odn_initial_default_setting() 336 od_table[2] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_socclk; in vega10_odn_initial_default_setting() 339 smu_get_voltage_dependency_table_ppt_v1(dep_table[i], od_table[i]); in vega10_odn_initial_default_setting() 346 i = od_table[2]->count - 1; in vega10_odn_initial_default_setting() 347 …od_table[2]->entries[i].clk = hwmgr->platform_descriptor.overdriveLimit.memoryClock > od_table[2]-… in vega10_odn_initial_default_setting() 349 od_table[2]->entries[i].clk; in vega10_odn_initial_default_setting() 350 od_table[2]->entries[i].vddc = odn_table->max_vddc > od_table[2]->entries[i].vddc ? in vega10_odn_initial_default_setting() 352 od_table[2]->entries[i].vddc; in vega10_odn_initial_default_setting()
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