Searched refs:od_enabled (Results 1 – 18 of 18) sorted by relevance
106 hwmgr->od_enabled = false; in hwmgr_early_init()111 hwmgr->od_enabled = false; in hwmgr_early_init()126 hwmgr->od_enabled = false; in hwmgr_early_init()181 hwmgr->od_enabled = false; in hwmgr_early_init()463 hwmgr->od_enabled = true; in hwmgr_set_user_specify_caps()
591 hwmgr->od_enabled = 1; in smu10_hwmgr_backend_init()1070 if (hwmgr->od_enabled) { in smu10_print_clock_levels()1086 if (hwmgr->od_enabled) { in smu10_print_clock_levels()1536 if (!hwmgr->od_enabled) { in smu10_set_fine_grain_clk_vol()
1615 if (hwmgr->od_enabled) in vega10_populate_single_gfx_level()1680 if (hwmgr->od_enabled) { in vega10_populate_single_soc_level()1783 if (hwmgr->od_enabled) in vega10_populate_vddc_soc_levels()1819 if (hwmgr->od_enabled) in vega10_populate_single_memory_level()2565 if (hwmgr->od_enabled) { in vega10_init_smc_table()3468 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()3474 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()4748 if (!hwmgr->od_enabled) in vega10_emit_clock_levels()4759 if (!hwmgr->od_enabled) in vega10_emit_clock_levels()4770 if (!hwmgr->od_enabled) in vega10_emit_clock_levels()[all …]
1077 if (hwmgr->od_enabled) { in smu7_setup_default_dpm_tables()4256 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()4263 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()4300 if ((!hwmgr->od_enabled || force_trim) in smu7_trim_single_dpm_states()5019 if (hwmgr->od_enabled) { in smu7_print_clock_levels()5028 if (hwmgr->od_enabled) { in smu7_print_clock_levels()5037 if (hwmgr->od_enabled) { in smu7_print_clock_levels()5500 if (!hwmgr->od_enabled) { in smu7_odn_edit_dpm_table()
1124 hwmgr->od_enabled = false; in vega20_od8_set_feature_capabilities()
1357 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()1365 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()1372 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()1397 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()1556 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()1565 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()1573 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()1598 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()2362 if (smu->od_enabled && in navi10_get_power_limit()2574 if (!smu->od_enabled) { in navi10_od_edit_dpm_table()
639 if (smu->od_enabled) { in sienna_cichlid_get_power_limit()1358 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()1369 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()1380 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()1397 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()2237 if (!smu->od_enabled) { in sienna_cichlid_od_edit_dpm_table()
1355 if (smu->od_enabled) { in arcturus_get_power_limit()
582 smu->od_enabled = true; in smu_set_funcs()622 smu->od_enabled = false; in smu_set_funcs()627 smu->od_enabled = true; in smu_set_funcs()636 smu->od_enabled = true; in smu_set_funcs()752 if (!amdgpu_sriov_vf(adev) || smu->od_enabled) { in smu_late_init()
985 if (hwmgr->od_enabled) { in pp_set_power_limit()1020 if (hwmgr->od_enabled) { in pp_get_power_limit()
355 smu->od_enabled = false; in smu_v13_0_7_check_powerplay_table()363 smu->od_enabled = false; in smu_v13_0_7_check_powerplay_table()1964 if (smu->od_enabled) { in smu_v13_0_7_get_power_limit()
370 smu->od_enabled = false; in smu_v13_0_0_check_powerplay_table()378 smu->od_enabled = false; in smu_v13_0_0_check_powerplay_table()2010 if (smu->od_enabled) { in smu_v13_0_0_get_power_limit()
497 bool od_enabled; member
1468 return (smu->od_enabled || smu->is_apu); in amdgpu_dpm_is_overdrive_supported()1481 return hwmgr->od_enabled; in amdgpu_dpm_is_overdrive_supported()
803 bool od_enabled; member
949 if (hwmgr->od_enabled) in fiji_populate_single_graphic_level()1171 if (hwmgr->od_enabled) in fiji_populate_single_memory_level()
969 if (hwmgr->od_enabled) in polaris10_populate_single_graphic_level()1164 if (hwmgr->od_enabled) in polaris10_populate_single_memory_level()
629 if (hwmgr->od_enabled) in tonga_populate_single_graphic_level()977 if (hwmgr->od_enabled) in tonga_populate_single_memory_level()