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/linux-6.6.21/drivers/mtd/nand/
Dcore.c22 bool nanddev_isbad(struct nand_device *nand, const struct nand_pos *pos) in nanddev_isbad() argument
27 if (nanddev_bbt_is_initialized(nand)) { in nanddev_isbad()
31 entry = nanddev_bbt_pos_to_entry(nand, pos); in nanddev_isbad()
32 status = nanddev_bbt_get_block_status(nand, entry); in nanddev_isbad()
35 if (nand->ops->isbad(nand, pos)) in nanddev_isbad()
40 nanddev_bbt_set_block_status(nand, entry, status); in nanddev_isbad()
50 return nand->ops->isbad(nand, pos); in nanddev_isbad()
64 int nanddev_markbad(struct nand_device *nand, const struct nand_pos *pos) in nanddev_markbad() argument
66 struct mtd_info *mtd = nanddev_to_mtd(nand); in nanddev_markbad()
70 if (nanddev_isbad(nand, pos)) in nanddev_markbad()
[all …]
Decc.c112 int nand_ecc_init_ctx(struct nand_device *nand) in nand_ecc_init_ctx() argument
114 if (!nand->ecc.engine || !nand->ecc.engine->ops->init_ctx) in nand_ecc_init_ctx()
117 return nand->ecc.engine->ops->init_ctx(nand); in nand_ecc_init_ctx()
125 void nand_ecc_cleanup_ctx(struct nand_device *nand) in nand_ecc_cleanup_ctx() argument
127 if (nand->ecc.engine && nand->ecc.engine->ops->cleanup_ctx) in nand_ecc_cleanup_ctx()
128 nand->ecc.engine->ops->cleanup_ctx(nand); in nand_ecc_cleanup_ctx()
137 int nand_ecc_prepare_io_req(struct nand_device *nand, in nand_ecc_prepare_io_req() argument
140 if (!nand->ecc.engine || !nand->ecc.engine->ops->prepare_io_req) in nand_ecc_prepare_io_req()
143 return nand->ecc.engine->ops->prepare_io_req(nand, req); in nand_ecc_prepare_io_req()
152 int nand_ecc_finish_io_req(struct nand_device *nand, in nand_ecc_finish_io_req() argument
[all …]
Decc-sw-bch.c23 int nand_ecc_sw_bch_calculate(struct nand_device *nand, in nand_ecc_sw_bch_calculate() argument
26 struct nand_ecc_sw_bch_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_bch_calculate()
30 bch_encode(engine_conf->bch, buf, nand->ecc.ctx.conf.step_size, code); in nand_ecc_sw_bch_calculate()
49 int nand_ecc_sw_bch_correct(struct nand_device *nand, unsigned char *buf, in nand_ecc_sw_bch_correct() argument
52 struct nand_ecc_sw_bch_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_bch_correct()
53 unsigned int step_size = nand->ecc.ctx.conf.step_size; in nand_ecc_sw_bch_correct()
82 static void nand_ecc_sw_bch_cleanup(struct nand_device *nand) in nand_ecc_sw_bch_cleanup() argument
84 struct nand_ecc_sw_bch_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_bch_cleanup()
108 static int nand_ecc_sw_bch_init(struct nand_device *nand) in nand_ecc_sw_bch_init() argument
110 struct nand_ecc_sw_bch_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_bch_init()
[all …]
Dbbt.c23 int nanddev_bbt_init(struct nand_device *nand) in nanddev_bbt_init() argument
26 unsigned int nblocks = nanddev_neraseblocks(nand); in nanddev_bbt_init()
28 nand->bbt.cache = bitmap_zalloc(nblocks * bits_per_block, GFP_KERNEL); in nanddev_bbt_init()
29 if (!nand->bbt.cache) in nanddev_bbt_init()
42 void nanddev_bbt_cleanup(struct nand_device *nand) in nanddev_bbt_cleanup() argument
44 bitmap_free(nand->bbt.cache); in nanddev_bbt_cleanup()
57 int nanddev_bbt_update(struct nand_device *nand) in nanddev_bbt_update() argument
71 int nanddev_bbt_get_block_status(const struct nand_device *nand, in nanddev_bbt_get_block_status() argument
75 unsigned long *pos = nand->bbt.cache + in nanddev_bbt_get_block_status()
80 if (entry >= nanddev_neraseblocks(nand)) in nanddev_bbt_get_block_status()
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Decc-sw-hamming.c362 int nand_ecc_sw_hamming_calculate(struct nand_device *nand, in nand_ecc_sw_hamming_calculate() argument
365 struct nand_ecc_sw_hamming_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_hamming_calculate()
366 unsigned int step_size = nand->ecc.ctx.conf.step_size; in nand_ecc_sw_hamming_calculate()
454 int nand_ecc_sw_hamming_correct(struct nand_device *nand, unsigned char *buf, in nand_ecc_sw_hamming_correct() argument
458 struct nand_ecc_sw_hamming_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_hamming_correct()
459 unsigned int step_size = nand->ecc.ctx.conf.step_size; in nand_ecc_sw_hamming_correct()
467 int nand_ecc_sw_hamming_init_ctx(struct nand_device *nand) in nand_ecc_sw_hamming_init_ctx() argument
469 struct nand_ecc_props *conf = &nand->ecc.ctx.conf; in nand_ecc_sw_hamming_init_ctx()
471 struct mtd_info *mtd = nanddev_to_mtd(nand); in nand_ecc_sw_hamming_init_ctx()
492 conf->step_size = nand->ecc.user_conf.step_size; in nand_ecc_sw_hamming_init_ctx()
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/linux-6.6.21/include/linux/mtd/
Dnand.h226 int (*erase)(struct nand_device *nand, const struct nand_pos *pos);
227 int (*markbad)(struct nand_device *nand, const struct nand_pos *pos);
228 bool (*isbad)(struct nand_device *nand, const struct nand_pos *pos);
258 int (*init_ctx)(struct nand_device *nand);
259 void (*cleanup_ctx)(struct nand_device *nand);
260 int (*prepare_io_req)(struct nand_device *nand,
262 int (*finish_io_req)(struct nand_device *nand,
298 void of_get_nand_ecc_user_config(struct nand_device *nand);
299 int nand_ecc_init_ctx(struct nand_device *nand);
300 void nand_ecc_cleanup_ctx(struct nand_device *nand);
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Dnand-ecc-sw-bch.h37 int nand_ecc_sw_bch_calculate(struct nand_device *nand,
39 int nand_ecc_sw_bch_correct(struct nand_device *nand, unsigned char *buf,
41 int nand_ecc_sw_bch_init_ctx(struct nand_device *nand);
42 void nand_ecc_sw_bch_cleanup_ctx(struct nand_device *nand);
47 static inline int nand_ecc_sw_bch_calculate(struct nand_device *nand, in nand_ecc_sw_bch_calculate() argument
54 static inline int nand_ecc_sw_bch_correct(struct nand_device *nand, in nand_ecc_sw_bch_correct() argument
62 static inline int nand_ecc_sw_bch_init_ctx(struct nand_device *nand) in nand_ecc_sw_bch_init_ctx() argument
67 static inline void nand_ecc_sw_bch_cleanup_ctx(struct nand_device *nand) {} in nand_ecc_sw_bch_cleanup_ctx() argument
/linux-6.6.21/drivers/mtd/nand/raw/
Dmeson_nand.c119 struct nand_chip nand; member
251 static struct meson_nfc_nand_chip *to_meson_nand(struct nand_chip *nand) in to_meson_nand() argument
253 return container_of(nand, struct meson_nfc_nand_chip, nand); in to_meson_nand()
256 static void meson_nfc_select_chip(struct nand_chip *nand, int chip) in meson_nfc_select_chip() argument
258 struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); in meson_nfc_select_chip()
259 struct meson_nfc *nfc = nand_get_controller_data(nand); in meson_nfc_select_chip()
299 static void meson_nfc_cmd_access(struct nand_chip *nand, int raw, bool dir, in meson_nfc_cmd_access() argument
302 struct mtd_info *mtd = nand_to_mtd(nand); in meson_nfc_cmd_access()
304 struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); in meson_nfc_cmd_access()
308 pagesize = nand->ecc.size; in meson_nfc_cmd_access()
[all …]
Dsunxi_nand.c194 struct nand_chip nand; member
203 static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) in to_sunxi_nand() argument
205 return container_of(nand, struct sunxi_nand_chip, nand); in to_sunxi_nand()
415 static void sunxi_nfc_select_chip(struct nand_chip *nand, unsigned int cs) in sunxi_nfc_select_chip() argument
417 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_select_chip()
418 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_select_chip()
419 struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller); in sunxi_nfc_select_chip()
430 ctl |= NFC_CE_SEL(sel->cs) | NFC_EN | NFC_PAGE_SHIFT(nand->page_shift); in sunxi_nfc_select_chip()
446 static void sunxi_nfc_read_buf(struct nand_chip *nand, uint8_t *buf, int len) in sunxi_nfc_read_buf() argument
448 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_read_buf()
[all …]
DMakefile3 obj-$(CONFIG_MTD_RAW_NAND) += nand.o
42 obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/
54 obj-$(CONFIG_MTD_NAND_CADENCE) += cadence-nand-controller.o
55 obj-$(CONFIG_MTD_NAND_ARASAN) += arasan-nand-controller.o
56 obj-$(CONFIG_MTD_NAND_INTEL_LGM) += intel-nand-controller.o
57 obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rockchip-nand-controller.o
58 obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o
59 obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o
61 nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
62 nand-objs += nand_onfi.o
[all …]
/linux-6.6.21/Documentation/devicetree/bindings/mtd/
Dmarvell,nand-controller.yaml4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
16 - const: marvell,armada-8k-nand-controller
17 - const: marvell,armada370-nand-controller
19 - marvell,ac5-nand-controller
20 - marvell,armada370-nand-controller
21 - marvell,pxa3xx-nand-controller
25 - marvell,armada-8k-nand
26 - marvell,armada370-nand
27 - marvell,pxa3xx-nand
60 "^nand@[a-f0-9]$":
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Ddenali,nand.yaml4 $id: http://devicetree.org/schemas/mtd/denali,nand.yaml#
15 - altr,socfpga-denali-nand
16 - socionext,uniphier-denali-nand-v5a
17 - socionext,uniphier-denali-nand-v5b
38 nand: controller core clock
42 - const: nand
53 nand: controller core reset
57 - const: nand
59 - const: nand
67 "^nand@[a-f0-9]$":
[all …]
Dqcom,nandc.yaml15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
35 "^nand@[a-f0-9]$":
37 $ref: raw-nand-chip.yaml
40 nand-bus-width:
43 nand-ecc-strength:
46 nand-ecc-step-size:
[all …]
Dsamsung-s3c2410.txt5 "samsung,s3c2410-nand"
6 "samsung,s3c2412-nand"
7 "samsung,s3c2440-nand"
9 - #address-cells, #size-cells : see nand-controller.yaml
10 - clocks : phandle to the nand controller clock
11 - clock-names : must contain "nand"
14 Child nodes representing the available nand chips.
17 - nand-ecc-mode : see nand-controller.yaml
18 - nand-on-flash-bbt : see nand-controller.yaml
26 nand-controller@4e000000 {
[all …]
Dnvidia-tegra20-nand.txt5 - "nvidia,tegra20-nand"
11 - nand
15 - nand
25 - nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only
27 - nand-ecc-algo: string, algorithm of NAND ECC.
29 - nand-bus-width : See nand-controller.yaml
30 - nand-on-flash-bbt: See nand-controller.yaml
31 - nand-ecc-strength: integer representing the number of bits to correct
36 - nand-ecc-maximize: See nand-controller.yaml
37 - nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM
[all …]
Dbrcm,brcmnand.yaml58 - const: brcm,nand-bcm63138
65 - const: brcm,nand-iproc
70 - const: brcm,nand-bcm63168
71 - const: brcm,nand-bcm6368
83 enum: [ nand, flash-dma, flash-edu, nand-cache, nand-int-base, iproc-idm, iproc-ext ]
104 const: nand
106 brcm,nand-has-wp:
115 "^nand@[a-f0-9]$":
117 $ref: raw-nand-chip.yaml
122 nand-ecc-step-size:
[all …]
Dmediatek,mtk-nfc.yaml42 "^nand@[a-f0-9]$":
43 $ref: raw-nand-chip.yaml#
48 nand-ecc-mode:
52 - $ref: nand-controller.yaml#
61 "^nand@[a-f0-9]$":
63 nand-ecc-step-size:
65 nand-ecc-strength:
76 "^nand@[a-f0-9]$":
78 nand-ecc-step-size:
80 nand-ecc-strength:
[all …]
Dvf610-nfc.txt10 - #address-cells: shall be set to 1. Encode the nand CS.
23 Children nodes represent the available nand chips. Currently the driver can
28 - nand-bus-width: see nand-controller.yaml
29 - nand-ecc-mode: see nand-controller.yaml
32 - nand-ecc-strength: supported strengths are 24 and 32 bit (see nand-controller.yaml)
33 - nand-ecc-step-size: step size equals page size, currently only 2k pages are
35 - nand-on-flash-bbt: see nand-controller.yaml
39 nfc: nand@400e0000 {
50 nand@0 {
53 nand-bus-width = <8>;
[all …]
Damlogic,meson-nand.yaml4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
10 - $ref: nand-controller.yaml
41 "^nand@[0-7]$":
43 $ref: raw-nand-chip.yaml
49 nand-ecc-mode:
52 nand-ecc-step-size:
55 nand-ecc-strength:
62 nand-rb:
70 nand-ecc-strength: [nand-ecc-step-size]
71 nand-ecc-step-size: [nand-ecc-strength]
[all …]
Dhisi504-nand.txt10 - nand-bus-width: See nand-controller.yaml.
11 - nand-ecc-mode: Support none and hw ecc mode.
17 - nand-ecc-strength: Number of bits to correct per ECC step.
18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
22 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
29 nand: nand@4020000 {
33 nand-bus-width = <8>;
34 nand-ecc-mode = "hw";
35 nand-ecc-strength = <16>;
36 nand-ecc-step-size = <1024>;
Drockchip,nand-controller.yaml4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
10 - $ref: nand-controller.yaml#
58 "^nand@[0-7]$":
60 $ref: raw-nand-chip.yaml
66 nand-ecc-mode:
69 nand-ecc-step-size:
72 nand-ecc-strength:
88 nand-bus-width:
98 Only used in combination with 'nand-is-boot-medium'.
118 Only used in combination with 'nand-is-boot-medium'.
[all …]
Dgpmi-nand.yaml4 $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
13 The GPMI nand controller provides an interface to control the NAND
22 - fsl,imx23-gpmi-nand
23 - fsl,imx28-gpmi-nand
24 - fsl,imx6q-gpmi-nand
25 - fsl,imx6sx-gpmi-nand
26 - fsl,imx7d-gpmi-nand
29 - fsl,imx8mm-gpmi-nand
30 - fsl,imx8mn-gpmi-nand
31 - const: fsl,imx7d-gpmi-nand
[all …]
/linux-6.6.21/drivers/mtd/nand/spi/
Dcore.c53 struct nand_device *nand = spinand_to_nand(spinand); in spinand_get_cfg() local
56 spinand->cur_target >= nand->memorg.ntargets)) in spinand_get_cfg()
65 struct nand_device *nand = spinand_to_nand(spinand); in spinand_set_cfg() local
69 spinand->cur_target >= nand->memorg.ntargets)) in spinand_set_cfg()
119 struct nand_device *nand = spinand_to_nand(spinand); in spinand_select_target() local
122 if (WARN_ON(target >= nand->memorg.ntargets)) in spinand_select_target()
128 if (nand->memorg.ntargets == 1) { in spinand_select_target()
143 struct nand_device *nand = spinand_to_nand(spinand); in spinand_read_cfg() local
147 for (target = 0; target < nand->memorg.ntargets; target++) { in spinand_read_cfg()
167 struct nand_device *nand = spinand_to_nand(spinand); in spinand_init_cfg_cache() local
[all …]
Desmt.c57 #define ESMT_OOB_SECTION_SIZE(nand) \ argument
58 (nanddev_per_page_oobsize(nand) / ESMT_OOB_SECTION_COUNT)
59 #define ESMT_OOB_FREE_SIZE(nand) \ argument
60 (ESMT_OOB_SECTION_SIZE(nand) / 2)
61 #define ESMT_OOB_ECC_SIZE(nand) \ argument
62 (ESMT_OOB_SECTION_SIZE(nand) - ESMT_OOB_FREE_SIZE(nand))
68 struct nand_device *nand = mtd_to_nanddev(mtd); in f50l1g41lb_ooblayout_ecc() local
73 region->offset = section * ESMT_OOB_SECTION_SIZE(nand) + in f50l1g41lb_ooblayout_ecc()
74 ESMT_OOB_FREE_SIZE(nand); in f50l1g41lb_ooblayout_ecc()
75 region->length = ESMT_OOB_ECC_SIZE(nand); in f50l1g41lb_ooblayout_ecc()
[all …]
/linux-6.6.21/drivers/mtd/nand/raw/atmel/
Dnand-controller.c201 struct atmel_nand *nand);
203 int (*setup_interface)(struct atmel_nand *nand, int csline,
205 int (*exec_op)(struct atmel_nand *nand,
471 static void atmel_nand_data_in(struct atmel_nand *nand, void *buf, in atmel_nand_data_in() argument
476 nc = to_nand_controller(nand->base.controller); in atmel_nand_data_in()
485 !atmel_nand_dma_transfer(nc, buf, nand->activecs->io.dma, len, in atmel_nand_data_in()
489 if ((nand->base.options & NAND_BUSWIDTH_16) && !force_8bit) in atmel_nand_data_in()
490 ioread16_rep(nand->activecs->io.virt, buf, len / 2); in atmel_nand_data_in()
492 ioread8_rep(nand->activecs->io.virt, buf, len); in atmel_nand_data_in()
495 static void atmel_nand_data_out(struct atmel_nand *nand, const void *buf, in atmel_nand_data_out() argument
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