Searched refs:mmUVD_VCPU_NONCACHE_OFFSET0 (Results 1 – 6 of 6) sorted by relevance
| /linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| D | vcn_2_5_offset.h | 721 #define mmUVD_VCPU_NONCACHE_OFFSET0 … macro
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| D | vcn_2_0_0_offset.h | 650 #define mmUVD_VCPU_NONCACHE_OFFSET0 … macro
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| D | vcn_3_0_0_offset.h | 1097 #define mmUVD_VCPU_NONCACHE_OFFSET0 … macro
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| /linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
| D | vcn_v2_0.c | 380 WREG32_SOC15(UVD, 0, mmUVD_VCPU_NONCACHE_OFFSET0, 0); in vcn_v2_0_mc_resume()
473 UVD, 0, mmUVD_VCPU_NONCACHE_OFFSET0), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
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| D | vcn_v2_5.c | 463 WREG32_SOC15(VCN, i, mmUVD_VCPU_NONCACHE_OFFSET0, 0); in vcn_v2_5_mc_resume()
555 VCN, 0, mmUVD_VCPU_NONCACHE_OFFSET0), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
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| D | vcn_v3_0.c | 493 WREG32_SOC15(VCN, inst, mmUVD_VCPU_NONCACHE_OFFSET0, 0); in vcn_v3_0_mc_resume()
584 VCN, inst_idx, mmUVD_VCPU_NONCACHE_OFFSET0), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
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