Home
last modified time | relevance | path

Searched refs:mmUVD_VCPU_CNTL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_offset.h191 #define mmUVD_VCPU_CNTL_BASE_IDX macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h377 #define mmUVD_VCPU_CNTL_BASE_IDX macro
Dvcn_2_5_offset.h730 #define mmUVD_VCPU_CNTL_BASE_IDX macro
Dvcn_2_0_0_offset.h659 #define mmUVD_VCPU_CNTL_BASE_IDX macro
Dvcn_3_0_0_offset.h1106 #define mmUVD_VCPU_CNTL_BASE_IDX macro