Searched refs:mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL (Results 1 – 15 of 15) sorted by relevance
82 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3DB1 macro
78 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3db1 macro
80 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3db1 macro
84 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3db1 macro
100 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL 0x3db1 macro
212 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
398 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
821 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
702 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
1207 #define mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL … macro
666 tmp = PACKET0(mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL, 0); in uvd_v3_1_hw_init()
180 tmp = PACKET0(mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL, 0); in uvd_v4_2_hw_init()
177 tmp = PACKET0(mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL, 0); in uvd_v5_0_hw_init()
489 tmp = PACKET0(mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL, 0); in uvd_v6_0_hw_init()
557 mmUVD_SEMA_WAIT_INCOMPLETE_TIMEOUT_CNTL), 0); in uvd_v7_0_hw_init()