1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2018 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8 /************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13 #ifndef ASIC_REG_TPC7_CFG_REGS_H_ 14 #define ASIC_REG_TPC7_CFG_REGS_H_ 15 16 /* 17 ***************************************** 18 * TPC7_CFG (Prototype: TPC) 19 ***************************************** 20 */ 21 22 #define mmTPC7_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW 0xFC6400 23 24 #define mmTPC7_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH 0xFC6404 25 26 #define mmTPC7_CFG_KERNEL_TENSOR_0_PADDING_VALUE 0xFC6408 27 28 #define mmTPC7_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG 0xFC640C 29 30 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_0_SIZE 0xFC6410 31 32 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_0_STRIDE 0xFC6414 33 34 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_1_SIZE 0xFC6418 35 36 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_1_STRIDE 0xFC641C 37 38 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_2_SIZE 0xFC6420 39 40 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_2_STRIDE 0xFC6424 41 42 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_3_SIZE 0xFC6428 43 44 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_3_STRIDE 0xFC642C 45 46 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_4_SIZE 0xFC6430 47 48 #define mmTPC7_CFG_KERNEL_TENSOR_0_DIM_4_STRIDE 0xFC6434 49 50 #define mmTPC7_CFG_KERNEL_TENSOR_1_BASE_ADDR_LOW 0xFC6438 51 52 #define mmTPC7_CFG_KERNEL_TENSOR_1_BASE_ADDR_HIGH 0xFC643C 53 54 #define mmTPC7_CFG_KERNEL_TENSOR_1_PADDING_VALUE 0xFC6440 55 56 #define mmTPC7_CFG_KERNEL_TENSOR_1_TENSOR_CONFIG 0xFC6444 57 58 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_0_SIZE 0xFC6448 59 60 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_0_STRIDE 0xFC644C 61 62 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_1_SIZE 0xFC6450 63 64 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_1_STRIDE 0xFC6454 65 66 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_2_SIZE 0xFC6458 67 68 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_2_STRIDE 0xFC645C 69 70 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_3_SIZE 0xFC6460 71 72 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_3_STRIDE 0xFC6464 73 74 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_4_SIZE 0xFC6468 75 76 #define mmTPC7_CFG_KERNEL_TENSOR_1_DIM_4_STRIDE 0xFC646C 77 78 #define mmTPC7_CFG_KERNEL_TENSOR_2_BASE_ADDR_LOW 0xFC6470 79 80 #define mmTPC7_CFG_KERNEL_TENSOR_2_BASE_ADDR_HIGH 0xFC6474 81 82 #define mmTPC7_CFG_KERNEL_TENSOR_2_PADDING_VALUE 0xFC6478 83 84 #define mmTPC7_CFG_KERNEL_TENSOR_2_TENSOR_CONFIG 0xFC647C 85 86 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_0_SIZE 0xFC6480 87 88 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_0_STRIDE 0xFC6484 89 90 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_1_SIZE 0xFC6488 91 92 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_1_STRIDE 0xFC648C 93 94 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_2_SIZE 0xFC6490 95 96 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_2_STRIDE 0xFC6494 97 98 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_3_SIZE 0xFC6498 99 100 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_3_STRIDE 0xFC649C 101 102 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_4_SIZE 0xFC64A0 103 104 #define mmTPC7_CFG_KERNEL_TENSOR_2_DIM_4_STRIDE 0xFC64A4 105 106 #define mmTPC7_CFG_KERNEL_TENSOR_3_BASE_ADDR_LOW 0xFC64A8 107 108 #define mmTPC7_CFG_KERNEL_TENSOR_3_BASE_ADDR_HIGH 0xFC64AC 109 110 #define mmTPC7_CFG_KERNEL_TENSOR_3_PADDING_VALUE 0xFC64B0 111 112 #define mmTPC7_CFG_KERNEL_TENSOR_3_TENSOR_CONFIG 0xFC64B4 113 114 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_0_SIZE 0xFC64B8 115 116 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_0_STRIDE 0xFC64BC 117 118 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_1_SIZE 0xFC64C0 119 120 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_1_STRIDE 0xFC64C4 121 122 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_2_SIZE 0xFC64C8 123 124 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_2_STRIDE 0xFC64CC 125 126 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_3_SIZE 0xFC64D0 127 128 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_3_STRIDE 0xFC64D4 129 130 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_4_SIZE 0xFC64D8 131 132 #define mmTPC7_CFG_KERNEL_TENSOR_3_DIM_4_STRIDE 0xFC64DC 133 134 #define mmTPC7_CFG_KERNEL_TENSOR_4_BASE_ADDR_LOW 0xFC64E0 135 136 #define mmTPC7_CFG_KERNEL_TENSOR_4_BASE_ADDR_HIGH 0xFC64E4 137 138 #define mmTPC7_CFG_KERNEL_TENSOR_4_PADDING_VALUE 0xFC64E8 139 140 #define mmTPC7_CFG_KERNEL_TENSOR_4_TENSOR_CONFIG 0xFC64EC 141 142 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_0_SIZE 0xFC64F0 143 144 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_0_STRIDE 0xFC64F4 145 146 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_1_SIZE 0xFC64F8 147 148 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_1_STRIDE 0xFC64FC 149 150 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_2_SIZE 0xFC6500 151 152 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_2_STRIDE 0xFC6504 153 154 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_3_SIZE 0xFC6508 155 156 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_3_STRIDE 0xFC650C 157 158 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_4_SIZE 0xFC6510 159 160 #define mmTPC7_CFG_KERNEL_TENSOR_4_DIM_4_STRIDE 0xFC6514 161 162 #define mmTPC7_CFG_KERNEL_TENSOR_5_BASE_ADDR_LOW 0xFC6518 163 164 #define mmTPC7_CFG_KERNEL_TENSOR_5_BASE_ADDR_HIGH 0xFC651C 165 166 #define mmTPC7_CFG_KERNEL_TENSOR_5_PADDING_VALUE 0xFC6520 167 168 #define mmTPC7_CFG_KERNEL_TENSOR_5_TENSOR_CONFIG 0xFC6524 169 170 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_0_SIZE 0xFC6528 171 172 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_0_STRIDE 0xFC652C 173 174 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_1_SIZE 0xFC6530 175 176 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_1_STRIDE 0xFC6534 177 178 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_2_SIZE 0xFC6538 179 180 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_2_STRIDE 0xFC653C 181 182 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_3_SIZE 0xFC6540 183 184 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_3_STRIDE 0xFC6544 185 186 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_4_SIZE 0xFC6548 187 188 #define mmTPC7_CFG_KERNEL_TENSOR_5_DIM_4_STRIDE 0xFC654C 189 190 #define mmTPC7_CFG_KERNEL_TENSOR_6_BASE_ADDR_LOW 0xFC6550 191 192 #define mmTPC7_CFG_KERNEL_TENSOR_6_BASE_ADDR_HIGH 0xFC6554 193 194 #define mmTPC7_CFG_KERNEL_TENSOR_6_PADDING_VALUE 0xFC6558 195 196 #define mmTPC7_CFG_KERNEL_TENSOR_6_TENSOR_CONFIG 0xFC655C 197 198 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_0_SIZE 0xFC6560 199 200 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_0_STRIDE 0xFC6564 201 202 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_1_SIZE 0xFC6568 203 204 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_1_STRIDE 0xFC656C 205 206 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_2_SIZE 0xFC6570 207 208 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_2_STRIDE 0xFC6574 209 210 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_3_SIZE 0xFC6578 211 212 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_3_STRIDE 0xFC657C 213 214 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_4_SIZE 0xFC6580 215 216 #define mmTPC7_CFG_KERNEL_TENSOR_6_DIM_4_STRIDE 0xFC6584 217 218 #define mmTPC7_CFG_KERNEL_TENSOR_7_BASE_ADDR_LOW 0xFC6588 219 220 #define mmTPC7_CFG_KERNEL_TENSOR_7_BASE_ADDR_HIGH 0xFC658C 221 222 #define mmTPC7_CFG_KERNEL_TENSOR_7_PADDING_VALUE 0xFC6590 223 224 #define mmTPC7_CFG_KERNEL_TENSOR_7_TENSOR_CONFIG 0xFC6594 225 226 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_0_SIZE 0xFC6598 227 228 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_0_STRIDE 0xFC659C 229 230 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_1_SIZE 0xFC65A0 231 232 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_1_STRIDE 0xFC65A4 233 234 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_2_SIZE 0xFC65A8 235 236 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_2_STRIDE 0xFC65AC 237 238 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_3_SIZE 0xFC65B0 239 240 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_3_STRIDE 0xFC65B4 241 242 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_4_SIZE 0xFC65B8 243 244 #define mmTPC7_CFG_KERNEL_TENSOR_7_DIM_4_STRIDE 0xFC65BC 245 246 #define mmTPC7_CFG_KERNEL_TENSOR_8_BASE_ADDR_LOW 0xFC65C0 247 248 #define mmTPC7_CFG_KERNEL_TENSOR_8_BASE_ADDR_HIGH 0xFC65C4 249 250 #define mmTPC7_CFG_KERNEL_TENSOR_8_PADDING_VALUE 0xFC65C8 251 252 #define mmTPC7_CFG_KERNEL_TENSOR_8_TENSOR_CONFIG 0xFC65CC 253 254 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_0_SIZE 0xFC65D0 255 256 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_0_STRIDE 0xFC65D4 257 258 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_1_SIZE 0xFC65D8 259 260 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_1_STRIDE 0xFC65DC 261 262 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_2_SIZE 0xFC65E0 263 264 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_2_STRIDE 0xFC65E4 265 266 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_3_SIZE 0xFC65E8 267 268 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_3_STRIDE 0xFC65EC 269 270 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_4_SIZE 0xFC65F0 271 272 #define mmTPC7_CFG_KERNEL_TENSOR_8_DIM_4_STRIDE 0xFC65F4 273 274 #define mmTPC7_CFG_KERNEL_TENSOR_9_BASE_ADDR_LOW 0xFC65F8 275 276 #define mmTPC7_CFG_KERNEL_TENSOR_9_BASE_ADDR_HIGH 0xFC65FC 277 278 #define mmTPC7_CFG_KERNEL_TENSOR_9_PADDING_VALUE 0xFC6600 279 280 #define mmTPC7_CFG_KERNEL_TENSOR_9_TENSOR_CONFIG 0xFC6604 281 282 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_0_SIZE 0xFC6608 283 284 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_0_STRIDE 0xFC660C 285 286 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_1_SIZE 0xFC6610 287 288 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_1_STRIDE 0xFC6614 289 290 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_2_SIZE 0xFC6618 291 292 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_2_STRIDE 0xFC661C 293 294 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_3_SIZE 0xFC6620 295 296 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_3_STRIDE 0xFC6624 297 298 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_4_SIZE 0xFC6628 299 300 #define mmTPC7_CFG_KERNEL_TENSOR_9_DIM_4_STRIDE 0xFC662C 301 302 #define mmTPC7_CFG_KERNEL_TENSOR_10_BASE_ADDR_LOW 0xFC6630 303 304 #define mmTPC7_CFG_KERNEL_TENSOR_10_BASE_ADDR_HIGH 0xFC6634 305 306 #define mmTPC7_CFG_KERNEL_TENSOR_10_PADDING_VALUE 0xFC6638 307 308 #define mmTPC7_CFG_KERNEL_TENSOR_10_TENSOR_CONFIG 0xFC663C 309 310 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_0_SIZE 0xFC6640 311 312 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_0_STRIDE 0xFC6644 313 314 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_1_SIZE 0xFC6648 315 316 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_1_STRIDE 0xFC664C 317 318 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_2_SIZE 0xFC6650 319 320 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_2_STRIDE 0xFC6654 321 322 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_3_SIZE 0xFC6658 323 324 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_3_STRIDE 0xFC665C 325 326 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_4_SIZE 0xFC6660 327 328 #define mmTPC7_CFG_KERNEL_TENSOR_10_DIM_4_STRIDE 0xFC6664 329 330 #define mmTPC7_CFG_KERNEL_TENSOR_11_BASE_ADDR_LOW 0xFC6668 331 332 #define mmTPC7_CFG_KERNEL_TENSOR_11_BASE_ADDR_HIGH 0xFC666C 333 334 #define mmTPC7_CFG_KERNEL_TENSOR_11_PADDING_VALUE 0xFC6670 335 336 #define mmTPC7_CFG_KERNEL_TENSOR_11_TENSOR_CONFIG 0xFC6674 337 338 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_0_SIZE 0xFC6678 339 340 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_0_STRIDE 0xFC667C 341 342 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_1_SIZE 0xFC6680 343 344 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_1_STRIDE 0xFC6684 345 346 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_2_SIZE 0xFC6688 347 348 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_2_STRIDE 0xFC668C 349 350 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_3_SIZE 0xFC6690 351 352 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_3_STRIDE 0xFC6694 353 354 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_4_SIZE 0xFC6698 355 356 #define mmTPC7_CFG_KERNEL_TENSOR_11_DIM_4_STRIDE 0xFC669C 357 358 #define mmTPC7_CFG_KERNEL_TENSOR_12_BASE_ADDR_LOW 0xFC66A0 359 360 #define mmTPC7_CFG_KERNEL_TENSOR_12_BASE_ADDR_HIGH 0xFC66A4 361 362 #define mmTPC7_CFG_KERNEL_TENSOR_12_PADDING_VALUE 0xFC66A8 363 364 #define mmTPC7_CFG_KERNEL_TENSOR_12_TENSOR_CONFIG 0xFC66AC 365 366 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_0_SIZE 0xFC66B0 367 368 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_0_STRIDE 0xFC66B4 369 370 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_1_SIZE 0xFC66B8 371 372 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_1_STRIDE 0xFC66BC 373 374 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_2_SIZE 0xFC66C0 375 376 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_2_STRIDE 0xFC66C4 377 378 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_3_SIZE 0xFC66C8 379 380 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_3_STRIDE 0xFC66CC 381 382 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_4_SIZE 0xFC66D0 383 384 #define mmTPC7_CFG_KERNEL_TENSOR_12_DIM_4_STRIDE 0xFC66D4 385 386 #define mmTPC7_CFG_KERNEL_TENSOR_13_BASE_ADDR_LOW 0xFC66D8 387 388 #define mmTPC7_CFG_KERNEL_TENSOR_13_BASE_ADDR_HIGH 0xFC66DC 389 390 #define mmTPC7_CFG_KERNEL_TENSOR_13_PADDING_VALUE 0xFC66E0 391 392 #define mmTPC7_CFG_KERNEL_TENSOR_13_TENSOR_CONFIG 0xFC66E4 393 394 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_0_SIZE 0xFC66E8 395 396 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_0_STRIDE 0xFC66EC 397 398 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_1_SIZE 0xFC66F0 399 400 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_1_STRIDE 0xFC66F4 401 402 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_2_SIZE 0xFC66F8 403 404 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_2_STRIDE 0xFC66FC 405 406 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_3_SIZE 0xFC6700 407 408 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_3_STRIDE 0xFC6704 409 410 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_4_SIZE 0xFC6708 411 412 #define mmTPC7_CFG_KERNEL_TENSOR_13_DIM_4_STRIDE 0xFC670C 413 414 #define mmTPC7_CFG_KERNEL_TENSOR_14_BASE_ADDR_LOW 0xFC6710 415 416 #define mmTPC7_CFG_KERNEL_TENSOR_14_BASE_ADDR_HIGH 0xFC6714 417 418 #define mmTPC7_CFG_KERNEL_TENSOR_14_PADDING_VALUE 0xFC6718 419 420 #define mmTPC7_CFG_KERNEL_TENSOR_14_TENSOR_CONFIG 0xFC671C 421 422 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_0_SIZE 0xFC6720 423 424 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_0_STRIDE 0xFC6724 425 426 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_1_SIZE 0xFC6728 427 428 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_1_STRIDE 0xFC672C 429 430 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_2_SIZE 0xFC6730 431 432 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_2_STRIDE 0xFC6734 433 434 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_3_SIZE 0xFC6738 435 436 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_3_STRIDE 0xFC673C 437 438 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_4_SIZE 0xFC6740 439 440 #define mmTPC7_CFG_KERNEL_TENSOR_14_DIM_4_STRIDE 0xFC6744 441 442 #define mmTPC7_CFG_KERNEL_TENSOR_15_BASE_ADDR_LOW 0xFC6748 443 444 #define mmTPC7_CFG_KERNEL_TENSOR_15_BASE_ADDR_HIGH 0xFC674C 445 446 #define mmTPC7_CFG_KERNEL_TENSOR_15_PADDING_VALUE 0xFC6750 447 448 #define mmTPC7_CFG_KERNEL_TENSOR_15_TENSOR_CONFIG 0xFC6754 449 450 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_0_SIZE 0xFC6758 451 452 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_0_STRIDE 0xFC675C 453 454 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_1_SIZE 0xFC6760 455 456 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_1_STRIDE 0xFC6764 457 458 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_2_SIZE 0xFC6768 459 460 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_2_STRIDE 0xFC676C 461 462 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_3_SIZE 0xFC6770 463 464 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_3_STRIDE 0xFC6774 465 466 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_4_SIZE 0xFC6778 467 468 #define mmTPC7_CFG_KERNEL_TENSOR_15_DIM_4_STRIDE 0xFC677C 469 470 #define mmTPC7_CFG_KERNEL_SYNC_OBJECT_MESSAGE 0xFC6780 471 472 #define mmTPC7_CFG_KERNEL_SYNC_OBJECT_ADDR 0xFC6784 473 474 #define mmTPC7_CFG_KERNEL_KERNEL_BASE_ADDRESS_LOW 0xFC6788 475 476 #define mmTPC7_CFG_KERNEL_KERNEL_BASE_ADDRESS_HIGH 0xFC678C 477 478 #define mmTPC7_CFG_KERNEL_TID_BASE_DIM_0 0xFC6790 479 480 #define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_0 0xFC6794 481 482 #define mmTPC7_CFG_KERNEL_TID_BASE_DIM_1 0xFC6798 483 484 #define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_1 0xFC679C 485 486 #define mmTPC7_CFG_KERNEL_TID_BASE_DIM_2 0xFC67A0 487 488 #define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_2 0xFC67A4 489 490 #define mmTPC7_CFG_KERNEL_TID_BASE_DIM_3 0xFC67A8 491 492 #define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_3 0xFC67AC 493 494 #define mmTPC7_CFG_KERNEL_TID_BASE_DIM_4 0xFC67B0 495 496 #define mmTPC7_CFG_KERNEL_TID_SIZE_DIM_4 0xFC67B4 497 498 #define mmTPC7_CFG_KERNEL_KERNEL_CONFIG 0xFC67B8 499 500 #define mmTPC7_CFG_KERNEL_KERNEL_ID 0xFC67BC 501 502 #define mmTPC7_CFG_KERNEL_SRF_0 0xFC67C0 503 504 #define mmTPC7_CFG_KERNEL_SRF_1 0xFC67C4 505 506 #define mmTPC7_CFG_KERNEL_SRF_2 0xFC67C8 507 508 #define mmTPC7_CFG_KERNEL_SRF_3 0xFC67CC 509 510 #define mmTPC7_CFG_KERNEL_SRF_4 0xFC67D0 511 512 #define mmTPC7_CFG_KERNEL_SRF_5 0xFC67D4 513 514 #define mmTPC7_CFG_KERNEL_SRF_6 0xFC67D8 515 516 #define mmTPC7_CFG_KERNEL_SRF_7 0xFC67DC 517 518 #define mmTPC7_CFG_KERNEL_SRF_8 0xFC67E0 519 520 #define mmTPC7_CFG_KERNEL_SRF_9 0xFC67E4 521 522 #define mmTPC7_CFG_KERNEL_SRF_10 0xFC67E8 523 524 #define mmTPC7_CFG_KERNEL_SRF_11 0xFC67EC 525 526 #define mmTPC7_CFG_KERNEL_SRF_12 0xFC67F0 527 528 #define mmTPC7_CFG_KERNEL_SRF_13 0xFC67F4 529 530 #define mmTPC7_CFG_KERNEL_SRF_14 0xFC67F8 531 532 #define mmTPC7_CFG_KERNEL_SRF_15 0xFC67FC 533 534 #define mmTPC7_CFG_KERNEL_SRF_16 0xFC6800 535 536 #define mmTPC7_CFG_KERNEL_SRF_17 0xFC6804 537 538 #define mmTPC7_CFG_KERNEL_SRF_18 0xFC6808 539 540 #define mmTPC7_CFG_KERNEL_SRF_19 0xFC680C 541 542 #define mmTPC7_CFG_KERNEL_SRF_20 0xFC6810 543 544 #define mmTPC7_CFG_KERNEL_SRF_21 0xFC6814 545 546 #define mmTPC7_CFG_KERNEL_SRF_22 0xFC6818 547 548 #define mmTPC7_CFG_KERNEL_SRF_23 0xFC681C 549 550 #define mmTPC7_CFG_KERNEL_SRF_24 0xFC6820 551 552 #define mmTPC7_CFG_KERNEL_SRF_25 0xFC6824 553 554 #define mmTPC7_CFG_KERNEL_SRF_26 0xFC6828 555 556 #define mmTPC7_CFG_KERNEL_SRF_27 0xFC682C 557 558 #define mmTPC7_CFG_KERNEL_SRF_28 0xFC6830 559 560 #define mmTPC7_CFG_KERNEL_SRF_29 0xFC6834 561 562 #define mmTPC7_CFG_KERNEL_SRF_30 0xFC6838 563 564 #define mmTPC7_CFG_KERNEL_SRF_31 0xFC683C 565 566 #define mmTPC7_CFG_ROUND_CSR 0xFC68FC 567 568 #define mmTPC7_CFG_PROT 0xFC6900 569 570 #define mmTPC7_CFG_SEMAPHORE 0xFC6908 571 572 #define mmTPC7_CFG_VFLAGS 0xFC690C 573 574 #define mmTPC7_CFG_SFLAGS 0xFC6910 575 576 #define mmTPC7_CFG_LFSR_POLYNOM 0xFC6918 577 578 #define mmTPC7_CFG_STATUS 0xFC691C 579 580 #define mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH 0xFC6920 581 582 #define mmTPC7_CFG_CFG_SUBTRACT_VALUE 0xFC6924 583 584 #define mmTPC7_CFG_SM_BASE_ADDRESS_HIGH 0xFC692C 585 586 #define mmTPC7_CFG_TPC_CMD 0xFC6930 587 588 #define mmTPC7_CFG_TPC_EXECUTE 0xFC6938 589 590 #define mmTPC7_CFG_TPC_STALL 0xFC693C 591 592 #define mmTPC7_CFG_ICACHE_BASE_ADDERESS_LOW 0xFC6940 593 594 #define mmTPC7_CFG_ICACHE_BASE_ADDERESS_HIGH 0xFC6944 595 596 #define mmTPC7_CFG_RD_RATE_LIMIT 0xFC6948 597 598 #define mmTPC7_CFG_WR_RATE_LIMIT 0xFC6950 599 600 #define mmTPC7_CFG_MSS_CONFIG 0xFC6954 601 602 #define mmTPC7_CFG_TPC_INTR_CAUSE 0xFC6958 603 604 #define mmTPC7_CFG_TPC_INTR_MASK 0xFC695C 605 606 #define mmTPC7_CFG_WQ_CREDITS 0xFC6960 607 608 #define mmTPC7_CFG_ARUSER_LO 0xFC6964 609 610 #define mmTPC7_CFG_ARUSER_HI 0xFC6968 611 612 #define mmTPC7_CFG_AWUSER_LO 0xFC696C 613 614 #define mmTPC7_CFG_AWUSER_HI 0xFC6970 615 616 #define mmTPC7_CFG_OPCODE_EXEC 0xFC6974 617 618 #define mmTPC7_CFG_LUT_FUNC32_BASE_ADDR_LO 0xFC6978 619 620 #define mmTPC7_CFG_LUT_FUNC32_BASE_ADDR_HI 0xFC697C 621 622 #define mmTPC7_CFG_LUT_FUNC64_BASE_ADDR_LO 0xFC6980 623 624 #define mmTPC7_CFG_LUT_FUNC64_BASE_ADDR_HI 0xFC6984 625 626 #define mmTPC7_CFG_LUT_FUNC128_BASE_ADDR_LO 0xFC6988 627 628 #define mmTPC7_CFG_LUT_FUNC128_BASE_ADDR_HI 0xFC698C 629 630 #define mmTPC7_CFG_LUT_FUNC256_BASE_ADDR_LO 0xFC6990 631 632 #define mmTPC7_CFG_LUT_FUNC256_BASE_ADDR_HI 0xFC6994 633 634 #define mmTPC7_CFG_TSB_CFG_MAX_SIZE 0xFC6998 635 636 #define mmTPC7_CFG_TSB_CFG 0xFC699C 637 638 #define mmTPC7_CFG_DBGMEM_ADD 0xFC69A0 639 640 #define mmTPC7_CFG_DBGMEM_DATA_WR 0xFC69A4 641 642 #define mmTPC7_CFG_DBGMEM_DATA_RD 0xFC69A8 643 644 #define mmTPC7_CFG_DBGMEM_CTRL 0xFC69AC 645 646 #define mmTPC7_CFG_DBGMEM_RC 0xFC69B0 647 648 #define mmTPC7_CFG_TSB_INFLIGHT_CNTR 0xFC69B4 649 650 #define mmTPC7_CFG_WQ_INFLIGHT_CNTR 0xFC69B8 651 652 #define mmTPC7_CFG_WQ_LBW_TOTAL_CNTR 0xFC69BC 653 654 #define mmTPC7_CFG_WQ_HBW_TOTAL_CNTR 0xFC69C0 655 656 #define mmTPC7_CFG_IRQ_OCCOUPY_CNTR 0xFC69C4 657 658 #define mmTPC7_CFG_FUNC_MBIST_CNTRL 0xFC69D0 659 660 #define mmTPC7_CFG_FUNC_MBIST_PAT 0xFC69D4 661 662 #define mmTPC7_CFG_FUNC_MBIST_MEM_0 0xFC69D8 663 664 #define mmTPC7_CFG_FUNC_MBIST_MEM_1 0xFC69DC 665 666 #define mmTPC7_CFG_FUNC_MBIST_MEM_2 0xFC69E0 667 668 #define mmTPC7_CFG_FUNC_MBIST_MEM_3 0xFC69E4 669 670 #define mmTPC7_CFG_FUNC_MBIST_MEM_4 0xFC69E8 671 672 #define mmTPC7_CFG_FUNC_MBIST_MEM_5 0xFC69EC 673 674 #define mmTPC7_CFG_FUNC_MBIST_MEM_6 0xFC69F0 675 676 #define mmTPC7_CFG_FUNC_MBIST_MEM_7 0xFC69F4 677 678 #define mmTPC7_CFG_FUNC_MBIST_MEM_8 0xFC69F8 679 680 #define mmTPC7_CFG_FUNC_MBIST_MEM_9 0xFC69FC 681 682 #define mmTPC7_CFG_QM_TENSOR_0_BASE_ADDR_LOW 0xFC6A00 683 684 #define mmTPC7_CFG_QM_TENSOR_0_BASE_ADDR_HIGH 0xFC6A04 685 686 #define mmTPC7_CFG_QM_TENSOR_0_PADDING_VALUE 0xFC6A08 687 688 #define mmTPC7_CFG_QM_TENSOR_0_TENSOR_CONFIG 0xFC6A0C 689 690 #define mmTPC7_CFG_QM_TENSOR_0_DIM_0_SIZE 0xFC6A10 691 692 #define mmTPC7_CFG_QM_TENSOR_0_DIM_0_STRIDE 0xFC6A14 693 694 #define mmTPC7_CFG_QM_TENSOR_0_DIM_1_SIZE 0xFC6A18 695 696 #define mmTPC7_CFG_QM_TENSOR_0_DIM_1_STRIDE 0xFC6A1C 697 698 #define mmTPC7_CFG_QM_TENSOR_0_DIM_2_SIZE 0xFC6A20 699 700 #define mmTPC7_CFG_QM_TENSOR_0_DIM_2_STRIDE 0xFC6A24 701 702 #define mmTPC7_CFG_QM_TENSOR_0_DIM_3_SIZE 0xFC6A28 703 704 #define mmTPC7_CFG_QM_TENSOR_0_DIM_3_STRIDE 0xFC6A2C 705 706 #define mmTPC7_CFG_QM_TENSOR_0_DIM_4_SIZE 0xFC6A30 707 708 #define mmTPC7_CFG_QM_TENSOR_0_DIM_4_STRIDE 0xFC6A34 709 710 #define mmTPC7_CFG_QM_TENSOR_1_BASE_ADDR_LOW 0xFC6A38 711 712 #define mmTPC7_CFG_QM_TENSOR_1_BASE_ADDR_HIGH 0xFC6A3C 713 714 #define mmTPC7_CFG_QM_TENSOR_1_PADDING_VALUE 0xFC6A40 715 716 #define mmTPC7_CFG_QM_TENSOR_1_TENSOR_CONFIG 0xFC6A44 717 718 #define mmTPC7_CFG_QM_TENSOR_1_DIM_0_SIZE 0xFC6A48 719 720 #define mmTPC7_CFG_QM_TENSOR_1_DIM_0_STRIDE 0xFC6A4C 721 722 #define mmTPC7_CFG_QM_TENSOR_1_DIM_1_SIZE 0xFC6A50 723 724 #define mmTPC7_CFG_QM_TENSOR_1_DIM_1_STRIDE 0xFC6A54 725 726 #define mmTPC7_CFG_QM_TENSOR_1_DIM_2_SIZE 0xFC6A58 727 728 #define mmTPC7_CFG_QM_TENSOR_1_DIM_2_STRIDE 0xFC6A5C 729 730 #define mmTPC7_CFG_QM_TENSOR_1_DIM_3_SIZE 0xFC6A60 731 732 #define mmTPC7_CFG_QM_TENSOR_1_DIM_3_STRIDE 0xFC6A64 733 734 #define mmTPC7_CFG_QM_TENSOR_1_DIM_4_SIZE 0xFC6A68 735 736 #define mmTPC7_CFG_QM_TENSOR_1_DIM_4_STRIDE 0xFC6A6C 737 738 #define mmTPC7_CFG_QM_TENSOR_2_BASE_ADDR_LOW 0xFC6A70 739 740 #define mmTPC7_CFG_QM_TENSOR_2_BASE_ADDR_HIGH 0xFC6A74 741 742 #define mmTPC7_CFG_QM_TENSOR_2_PADDING_VALUE 0xFC6A78 743 744 #define mmTPC7_CFG_QM_TENSOR_2_TENSOR_CONFIG 0xFC6A7C 745 746 #define mmTPC7_CFG_QM_TENSOR_2_DIM_0_SIZE 0xFC6A80 747 748 #define mmTPC7_CFG_QM_TENSOR_2_DIM_0_STRIDE 0xFC6A84 749 750 #define mmTPC7_CFG_QM_TENSOR_2_DIM_1_SIZE 0xFC6A88 751 752 #define mmTPC7_CFG_QM_TENSOR_2_DIM_1_STRIDE 0xFC6A8C 753 754 #define mmTPC7_CFG_QM_TENSOR_2_DIM_2_SIZE 0xFC6A90 755 756 #define mmTPC7_CFG_QM_TENSOR_2_DIM_2_STRIDE 0xFC6A94 757 758 #define mmTPC7_CFG_QM_TENSOR_2_DIM_3_SIZE 0xFC6A98 759 760 #define mmTPC7_CFG_QM_TENSOR_2_DIM_3_STRIDE 0xFC6A9C 761 762 #define mmTPC7_CFG_QM_TENSOR_2_DIM_4_SIZE 0xFC6AA0 763 764 #define mmTPC7_CFG_QM_TENSOR_2_DIM_4_STRIDE 0xFC6AA4 765 766 #define mmTPC7_CFG_QM_TENSOR_3_BASE_ADDR_LOW 0xFC6AA8 767 768 #define mmTPC7_CFG_QM_TENSOR_3_BASE_ADDR_HIGH 0xFC6AAC 769 770 #define mmTPC7_CFG_QM_TENSOR_3_PADDING_VALUE 0xFC6AB0 771 772 #define mmTPC7_CFG_QM_TENSOR_3_TENSOR_CONFIG 0xFC6AB4 773 774 #define mmTPC7_CFG_QM_TENSOR_3_DIM_0_SIZE 0xFC6AB8 775 776 #define mmTPC7_CFG_QM_TENSOR_3_DIM_0_STRIDE 0xFC6ABC 777 778 #define mmTPC7_CFG_QM_TENSOR_3_DIM_1_SIZE 0xFC6AC0 779 780 #define mmTPC7_CFG_QM_TENSOR_3_DIM_1_STRIDE 0xFC6AC4 781 782 #define mmTPC7_CFG_QM_TENSOR_3_DIM_2_SIZE 0xFC6AC8 783 784 #define mmTPC7_CFG_QM_TENSOR_3_DIM_2_STRIDE 0xFC6ACC 785 786 #define mmTPC7_CFG_QM_TENSOR_3_DIM_3_SIZE 0xFC6AD0 787 788 #define mmTPC7_CFG_QM_TENSOR_3_DIM_3_STRIDE 0xFC6AD4 789 790 #define mmTPC7_CFG_QM_TENSOR_3_DIM_4_SIZE 0xFC6AD8 791 792 #define mmTPC7_CFG_QM_TENSOR_3_DIM_4_STRIDE 0xFC6ADC 793 794 #define mmTPC7_CFG_QM_TENSOR_4_BASE_ADDR_LOW 0xFC6AE0 795 796 #define mmTPC7_CFG_QM_TENSOR_4_BASE_ADDR_HIGH 0xFC6AE4 797 798 #define mmTPC7_CFG_QM_TENSOR_4_PADDING_VALUE 0xFC6AE8 799 800 #define mmTPC7_CFG_QM_TENSOR_4_TENSOR_CONFIG 0xFC6AEC 801 802 #define mmTPC7_CFG_QM_TENSOR_4_DIM_0_SIZE 0xFC6AF0 803 804 #define mmTPC7_CFG_QM_TENSOR_4_DIM_0_STRIDE 0xFC6AF4 805 806 #define mmTPC7_CFG_QM_TENSOR_4_DIM_1_SIZE 0xFC6AF8 807 808 #define mmTPC7_CFG_QM_TENSOR_4_DIM_1_STRIDE 0xFC6AFC 809 810 #define mmTPC7_CFG_QM_TENSOR_4_DIM_2_SIZE 0xFC6B00 811 812 #define mmTPC7_CFG_QM_TENSOR_4_DIM_2_STRIDE 0xFC6B04 813 814 #define mmTPC7_CFG_QM_TENSOR_4_DIM_3_SIZE 0xFC6B08 815 816 #define mmTPC7_CFG_QM_TENSOR_4_DIM_3_STRIDE 0xFC6B0C 817 818 #define mmTPC7_CFG_QM_TENSOR_4_DIM_4_SIZE 0xFC6B10 819 820 #define mmTPC7_CFG_QM_TENSOR_4_DIM_4_STRIDE 0xFC6B14 821 822 #define mmTPC7_CFG_QM_TENSOR_5_BASE_ADDR_LOW 0xFC6B18 823 824 #define mmTPC7_CFG_QM_TENSOR_5_BASE_ADDR_HIGH 0xFC6B1C 825 826 #define mmTPC7_CFG_QM_TENSOR_5_PADDING_VALUE 0xFC6B20 827 828 #define mmTPC7_CFG_QM_TENSOR_5_TENSOR_CONFIG 0xFC6B24 829 830 #define mmTPC7_CFG_QM_TENSOR_5_DIM_0_SIZE 0xFC6B28 831 832 #define mmTPC7_CFG_QM_TENSOR_5_DIM_0_STRIDE 0xFC6B2C 833 834 #define mmTPC7_CFG_QM_TENSOR_5_DIM_1_SIZE 0xFC6B30 835 836 #define mmTPC7_CFG_QM_TENSOR_5_DIM_1_STRIDE 0xFC6B34 837 838 #define mmTPC7_CFG_QM_TENSOR_5_DIM_2_SIZE 0xFC6B38 839 840 #define mmTPC7_CFG_QM_TENSOR_5_DIM_2_STRIDE 0xFC6B3C 841 842 #define mmTPC7_CFG_QM_TENSOR_5_DIM_3_SIZE 0xFC6B40 843 844 #define mmTPC7_CFG_QM_TENSOR_5_DIM_3_STRIDE 0xFC6B44 845 846 #define mmTPC7_CFG_QM_TENSOR_5_DIM_4_SIZE 0xFC6B48 847 848 #define mmTPC7_CFG_QM_TENSOR_5_DIM_4_STRIDE 0xFC6B4C 849 850 #define mmTPC7_CFG_QM_TENSOR_6_BASE_ADDR_LOW 0xFC6B50 851 852 #define mmTPC7_CFG_QM_TENSOR_6_BASE_ADDR_HIGH 0xFC6B54 853 854 #define mmTPC7_CFG_QM_TENSOR_6_PADDING_VALUE 0xFC6B58 855 856 #define mmTPC7_CFG_QM_TENSOR_6_TENSOR_CONFIG 0xFC6B5C 857 858 #define mmTPC7_CFG_QM_TENSOR_6_DIM_0_SIZE 0xFC6B60 859 860 #define mmTPC7_CFG_QM_TENSOR_6_DIM_0_STRIDE 0xFC6B64 861 862 #define mmTPC7_CFG_QM_TENSOR_6_DIM_1_SIZE 0xFC6B68 863 864 #define mmTPC7_CFG_QM_TENSOR_6_DIM_1_STRIDE 0xFC6B6C 865 866 #define mmTPC7_CFG_QM_TENSOR_6_DIM_2_SIZE 0xFC6B70 867 868 #define mmTPC7_CFG_QM_TENSOR_6_DIM_2_STRIDE 0xFC6B74 869 870 #define mmTPC7_CFG_QM_TENSOR_6_DIM_3_SIZE 0xFC6B78 871 872 #define mmTPC7_CFG_QM_TENSOR_6_DIM_3_STRIDE 0xFC6B7C 873 874 #define mmTPC7_CFG_QM_TENSOR_6_DIM_4_SIZE 0xFC6B80 875 876 #define mmTPC7_CFG_QM_TENSOR_6_DIM_4_STRIDE 0xFC6B84 877 878 #define mmTPC7_CFG_QM_TENSOR_7_BASE_ADDR_LOW 0xFC6B88 879 880 #define mmTPC7_CFG_QM_TENSOR_7_BASE_ADDR_HIGH 0xFC6B8C 881 882 #define mmTPC7_CFG_QM_TENSOR_7_PADDING_VALUE 0xFC6B90 883 884 #define mmTPC7_CFG_QM_TENSOR_7_TENSOR_CONFIG 0xFC6B94 885 886 #define mmTPC7_CFG_QM_TENSOR_7_DIM_0_SIZE 0xFC6B98 887 888 #define mmTPC7_CFG_QM_TENSOR_7_DIM_0_STRIDE 0xFC6B9C 889 890 #define mmTPC7_CFG_QM_TENSOR_7_DIM_1_SIZE 0xFC6BA0 891 892 #define mmTPC7_CFG_QM_TENSOR_7_DIM_1_STRIDE 0xFC6BA4 893 894 #define mmTPC7_CFG_QM_TENSOR_7_DIM_2_SIZE 0xFC6BA8 895 896 #define mmTPC7_CFG_QM_TENSOR_7_DIM_2_STRIDE 0xFC6BAC 897 898 #define mmTPC7_CFG_QM_TENSOR_7_DIM_3_SIZE 0xFC6BB0 899 900 #define mmTPC7_CFG_QM_TENSOR_7_DIM_3_STRIDE 0xFC6BB4 901 902 #define mmTPC7_CFG_QM_TENSOR_7_DIM_4_SIZE 0xFC6BB8 903 904 #define mmTPC7_CFG_QM_TENSOR_7_DIM_4_STRIDE 0xFC6BBC 905 906 #define mmTPC7_CFG_QM_TENSOR_8_BASE_ADDR_LOW 0xFC6BC0 907 908 #define mmTPC7_CFG_QM_TENSOR_8_BASE_ADDR_HIGH 0xFC6BC4 909 910 #define mmTPC7_CFG_QM_TENSOR_8_PADDING_VALUE 0xFC6BC8 911 912 #define mmTPC7_CFG_QM_TENSOR_8_TENSOR_CONFIG 0xFC6BCC 913 914 #define mmTPC7_CFG_QM_TENSOR_8_DIM_0_SIZE 0xFC6BD0 915 916 #define mmTPC7_CFG_QM_TENSOR_8_DIM_0_STRIDE 0xFC6BD4 917 918 #define mmTPC7_CFG_QM_TENSOR_8_DIM_1_SIZE 0xFC6BD8 919 920 #define mmTPC7_CFG_QM_TENSOR_8_DIM_1_STRIDE 0xFC6BDC 921 922 #define mmTPC7_CFG_QM_TENSOR_8_DIM_2_SIZE 0xFC6BE0 923 924 #define mmTPC7_CFG_QM_TENSOR_8_DIM_2_STRIDE 0xFC6BE4 925 926 #define mmTPC7_CFG_QM_TENSOR_8_DIM_3_SIZE 0xFC6BE8 927 928 #define mmTPC7_CFG_QM_TENSOR_8_DIM_3_STRIDE 0xFC6BEC 929 930 #define mmTPC7_CFG_QM_TENSOR_8_DIM_4_SIZE 0xFC6BF0 931 932 #define mmTPC7_CFG_QM_TENSOR_8_DIM_4_STRIDE 0xFC6BF4 933 934 #define mmTPC7_CFG_QM_TENSOR_9_BASE_ADDR_LOW 0xFC6BF8 935 936 #define mmTPC7_CFG_QM_TENSOR_9_BASE_ADDR_HIGH 0xFC6BFC 937 938 #define mmTPC7_CFG_QM_TENSOR_9_PADDING_VALUE 0xFC6C00 939 940 #define mmTPC7_CFG_QM_TENSOR_9_TENSOR_CONFIG 0xFC6C04 941 942 #define mmTPC7_CFG_QM_TENSOR_9_DIM_0_SIZE 0xFC6C08 943 944 #define mmTPC7_CFG_QM_TENSOR_9_DIM_0_STRIDE 0xFC6C0C 945 946 #define mmTPC7_CFG_QM_TENSOR_9_DIM_1_SIZE 0xFC6C10 947 948 #define mmTPC7_CFG_QM_TENSOR_9_DIM_1_STRIDE 0xFC6C14 949 950 #define mmTPC7_CFG_QM_TENSOR_9_DIM_2_SIZE 0xFC6C18 951 952 #define mmTPC7_CFG_QM_TENSOR_9_DIM_2_STRIDE 0xFC6C1C 953 954 #define mmTPC7_CFG_QM_TENSOR_9_DIM_3_SIZE 0xFC6C20 955 956 #define mmTPC7_CFG_QM_TENSOR_9_DIM_3_STRIDE 0xFC6C24 957 958 #define mmTPC7_CFG_QM_TENSOR_9_DIM_4_SIZE 0xFC6C28 959 960 #define mmTPC7_CFG_QM_TENSOR_9_DIM_4_STRIDE 0xFC6C2C 961 962 #define mmTPC7_CFG_QM_TENSOR_10_BASE_ADDR_LOW 0xFC6C30 963 964 #define mmTPC7_CFG_QM_TENSOR_10_BASE_ADDR_HIGH 0xFC6C34 965 966 #define mmTPC7_CFG_QM_TENSOR_10_PADDING_VALUE 0xFC6C38 967 968 #define mmTPC7_CFG_QM_TENSOR_10_TENSOR_CONFIG 0xFC6C3C 969 970 #define mmTPC7_CFG_QM_TENSOR_10_DIM_0_SIZE 0xFC6C40 971 972 #define mmTPC7_CFG_QM_TENSOR_10_DIM_0_STRIDE 0xFC6C44 973 974 #define mmTPC7_CFG_QM_TENSOR_10_DIM_1_SIZE 0xFC6C48 975 976 #define mmTPC7_CFG_QM_TENSOR_10_DIM_1_STRIDE 0xFC6C4C 977 978 #define mmTPC7_CFG_QM_TENSOR_10_DIM_2_SIZE 0xFC6C50 979 980 #define mmTPC7_CFG_QM_TENSOR_10_DIM_2_STRIDE 0xFC6C54 981 982 #define mmTPC7_CFG_QM_TENSOR_10_DIM_3_SIZE 0xFC6C58 983 984 #define mmTPC7_CFG_QM_TENSOR_10_DIM_3_STRIDE 0xFC6C5C 985 986 #define mmTPC7_CFG_QM_TENSOR_10_DIM_4_SIZE 0xFC6C60 987 988 #define mmTPC7_CFG_QM_TENSOR_10_DIM_4_STRIDE 0xFC6C64 989 990 #define mmTPC7_CFG_QM_TENSOR_11_BASE_ADDR_LOW 0xFC6C68 991 992 #define mmTPC7_CFG_QM_TENSOR_11_BASE_ADDR_HIGH 0xFC6C6C 993 994 #define mmTPC7_CFG_QM_TENSOR_11_PADDING_VALUE 0xFC6C70 995 996 #define mmTPC7_CFG_QM_TENSOR_11_TENSOR_CONFIG 0xFC6C74 997 998 #define mmTPC7_CFG_QM_TENSOR_11_DIM_0_SIZE 0xFC6C78 999 1000 #define mmTPC7_CFG_QM_TENSOR_11_DIM_0_STRIDE 0xFC6C7C 1001 1002 #define mmTPC7_CFG_QM_TENSOR_11_DIM_1_SIZE 0xFC6C80 1003 1004 #define mmTPC7_CFG_QM_TENSOR_11_DIM_1_STRIDE 0xFC6C84 1005 1006 #define mmTPC7_CFG_QM_TENSOR_11_DIM_2_SIZE 0xFC6C88 1007 1008 #define mmTPC7_CFG_QM_TENSOR_11_DIM_2_STRIDE 0xFC6C8C 1009 1010 #define mmTPC7_CFG_QM_TENSOR_11_DIM_3_SIZE 0xFC6C90 1011 1012 #define mmTPC7_CFG_QM_TENSOR_11_DIM_3_STRIDE 0xFC6C94 1013 1014 #define mmTPC7_CFG_QM_TENSOR_11_DIM_4_SIZE 0xFC6C98 1015 1016 #define mmTPC7_CFG_QM_TENSOR_11_DIM_4_STRIDE 0xFC6C9C 1017 1018 #define mmTPC7_CFG_QM_TENSOR_12_BASE_ADDR_LOW 0xFC6CA0 1019 1020 #define mmTPC7_CFG_QM_TENSOR_12_BASE_ADDR_HIGH 0xFC6CA4 1021 1022 #define mmTPC7_CFG_QM_TENSOR_12_PADDING_VALUE 0xFC6CA8 1023 1024 #define mmTPC7_CFG_QM_TENSOR_12_TENSOR_CONFIG 0xFC6CAC 1025 1026 #define mmTPC7_CFG_QM_TENSOR_12_DIM_0_SIZE 0xFC6CB0 1027 1028 #define mmTPC7_CFG_QM_TENSOR_12_DIM_0_STRIDE 0xFC6CB4 1029 1030 #define mmTPC7_CFG_QM_TENSOR_12_DIM_1_SIZE 0xFC6CB8 1031 1032 #define mmTPC7_CFG_QM_TENSOR_12_DIM_1_STRIDE 0xFC6CBC 1033 1034 #define mmTPC7_CFG_QM_TENSOR_12_DIM_2_SIZE 0xFC6CC0 1035 1036 #define mmTPC7_CFG_QM_TENSOR_12_DIM_2_STRIDE 0xFC6CC4 1037 1038 #define mmTPC7_CFG_QM_TENSOR_12_DIM_3_SIZE 0xFC6CC8 1039 1040 #define mmTPC7_CFG_QM_TENSOR_12_DIM_3_STRIDE 0xFC6CCC 1041 1042 #define mmTPC7_CFG_QM_TENSOR_12_DIM_4_SIZE 0xFC6CD0 1043 1044 #define mmTPC7_CFG_QM_TENSOR_12_DIM_4_STRIDE 0xFC6CD4 1045 1046 #define mmTPC7_CFG_QM_TENSOR_13_BASE_ADDR_LOW 0xFC6CD8 1047 1048 #define mmTPC7_CFG_QM_TENSOR_13_BASE_ADDR_HIGH 0xFC6CDC 1049 1050 #define mmTPC7_CFG_QM_TENSOR_13_PADDING_VALUE 0xFC6CE0 1051 1052 #define mmTPC7_CFG_QM_TENSOR_13_TENSOR_CONFIG 0xFC6CE4 1053 1054 #define mmTPC7_CFG_QM_TENSOR_13_DIM_0_SIZE 0xFC6CE8 1055 1056 #define mmTPC7_CFG_QM_TENSOR_13_DIM_0_STRIDE 0xFC6CEC 1057 1058 #define mmTPC7_CFG_QM_TENSOR_13_DIM_1_SIZE 0xFC6CF0 1059 1060 #define mmTPC7_CFG_QM_TENSOR_13_DIM_1_STRIDE 0xFC6CF4 1061 1062 #define mmTPC7_CFG_QM_TENSOR_13_DIM_2_SIZE 0xFC6CF8 1063 1064 #define mmTPC7_CFG_QM_TENSOR_13_DIM_2_STRIDE 0xFC6CFC 1065 1066 #define mmTPC7_CFG_QM_TENSOR_13_DIM_3_SIZE 0xFC6D00 1067 1068 #define mmTPC7_CFG_QM_TENSOR_13_DIM_3_STRIDE 0xFC6D04 1069 1070 #define mmTPC7_CFG_QM_TENSOR_13_DIM_4_SIZE 0xFC6D08 1071 1072 #define mmTPC7_CFG_QM_TENSOR_13_DIM_4_STRIDE 0xFC6D0C 1073 1074 #define mmTPC7_CFG_QM_TENSOR_14_BASE_ADDR_LOW 0xFC6D10 1075 1076 #define mmTPC7_CFG_QM_TENSOR_14_BASE_ADDR_HIGH 0xFC6D14 1077 1078 #define mmTPC7_CFG_QM_TENSOR_14_PADDING_VALUE 0xFC6D18 1079 1080 #define mmTPC7_CFG_QM_TENSOR_14_TENSOR_CONFIG 0xFC6D1C 1081 1082 #define mmTPC7_CFG_QM_TENSOR_14_DIM_0_SIZE 0xFC6D20 1083 1084 #define mmTPC7_CFG_QM_TENSOR_14_DIM_0_STRIDE 0xFC6D24 1085 1086 #define mmTPC7_CFG_QM_TENSOR_14_DIM_1_SIZE 0xFC6D28 1087 1088 #define mmTPC7_CFG_QM_TENSOR_14_DIM_1_STRIDE 0xFC6D2C 1089 1090 #define mmTPC7_CFG_QM_TENSOR_14_DIM_2_SIZE 0xFC6D30 1091 1092 #define mmTPC7_CFG_QM_TENSOR_14_DIM_2_STRIDE 0xFC6D34 1093 1094 #define mmTPC7_CFG_QM_TENSOR_14_DIM_3_SIZE 0xFC6D38 1095 1096 #define mmTPC7_CFG_QM_TENSOR_14_DIM_3_STRIDE 0xFC6D3C 1097 1098 #define mmTPC7_CFG_QM_TENSOR_14_DIM_4_SIZE 0xFC6D40 1099 1100 #define mmTPC7_CFG_QM_TENSOR_14_DIM_4_STRIDE 0xFC6D44 1101 1102 #define mmTPC7_CFG_QM_TENSOR_15_BASE_ADDR_LOW 0xFC6D48 1103 1104 #define mmTPC7_CFG_QM_TENSOR_15_BASE_ADDR_HIGH 0xFC6D4C 1105 1106 #define mmTPC7_CFG_QM_TENSOR_15_PADDING_VALUE 0xFC6D50 1107 1108 #define mmTPC7_CFG_QM_TENSOR_15_TENSOR_CONFIG 0xFC6D54 1109 1110 #define mmTPC7_CFG_QM_TENSOR_15_DIM_0_SIZE 0xFC6D58 1111 1112 #define mmTPC7_CFG_QM_TENSOR_15_DIM_0_STRIDE 0xFC6D5C 1113 1114 #define mmTPC7_CFG_QM_TENSOR_15_DIM_1_SIZE 0xFC6D60 1115 1116 #define mmTPC7_CFG_QM_TENSOR_15_DIM_1_STRIDE 0xFC6D64 1117 1118 #define mmTPC7_CFG_QM_TENSOR_15_DIM_2_SIZE 0xFC6D68 1119 1120 #define mmTPC7_CFG_QM_TENSOR_15_DIM_2_STRIDE 0xFC6D6C 1121 1122 #define mmTPC7_CFG_QM_TENSOR_15_DIM_3_SIZE 0xFC6D70 1123 1124 #define mmTPC7_CFG_QM_TENSOR_15_DIM_3_STRIDE 0xFC6D74 1125 1126 #define mmTPC7_CFG_QM_TENSOR_15_DIM_4_SIZE 0xFC6D78 1127 1128 #define mmTPC7_CFG_QM_TENSOR_15_DIM_4_STRIDE 0xFC6D7C 1129 1130 #define mmTPC7_CFG_QM_SYNC_OBJECT_MESSAGE 0xFC6D80 1131 1132 #define mmTPC7_CFG_QM_SYNC_OBJECT_ADDR 0xFC6D84 1133 1134 #define mmTPC7_CFG_QM_KERNEL_BASE_ADDRESS_LOW 0xFC6D88 1135 1136 #define mmTPC7_CFG_QM_KERNEL_BASE_ADDRESS_HIGH 0xFC6D8C 1137 1138 #define mmTPC7_CFG_QM_TID_BASE_DIM_0 0xFC6D90 1139 1140 #define mmTPC7_CFG_QM_TID_SIZE_DIM_0 0xFC6D94 1141 1142 #define mmTPC7_CFG_QM_TID_BASE_DIM_1 0xFC6D98 1143 1144 #define mmTPC7_CFG_QM_TID_SIZE_DIM_1 0xFC6D9C 1145 1146 #define mmTPC7_CFG_QM_TID_BASE_DIM_2 0xFC6DA0 1147 1148 #define mmTPC7_CFG_QM_TID_SIZE_DIM_2 0xFC6DA4 1149 1150 #define mmTPC7_CFG_QM_TID_BASE_DIM_3 0xFC6DA8 1151 1152 #define mmTPC7_CFG_QM_TID_SIZE_DIM_3 0xFC6DAC 1153 1154 #define mmTPC7_CFG_QM_TID_BASE_DIM_4 0xFC6DB0 1155 1156 #define mmTPC7_CFG_QM_TID_SIZE_DIM_4 0xFC6DB4 1157 1158 #define mmTPC7_CFG_QM_KERNEL_CONFIG 0xFC6DB8 1159 1160 #define mmTPC7_CFG_QM_KERNEL_ID 0xFC6DBC 1161 1162 #define mmTPC7_CFG_QM_SRF_0 0xFC6DC0 1163 1164 #define mmTPC7_CFG_QM_SRF_1 0xFC6DC4 1165 1166 #define mmTPC7_CFG_QM_SRF_2 0xFC6DC8 1167 1168 #define mmTPC7_CFG_QM_SRF_3 0xFC6DCC 1169 1170 #define mmTPC7_CFG_QM_SRF_4 0xFC6DD0 1171 1172 #define mmTPC7_CFG_QM_SRF_5 0xFC6DD4 1173 1174 #define mmTPC7_CFG_QM_SRF_6 0xFC6DD8 1175 1176 #define mmTPC7_CFG_QM_SRF_7 0xFC6DDC 1177 1178 #define mmTPC7_CFG_QM_SRF_8 0xFC6DE0 1179 1180 #define mmTPC7_CFG_QM_SRF_9 0xFC6DE4 1181 1182 #define mmTPC7_CFG_QM_SRF_10 0xFC6DE8 1183 1184 #define mmTPC7_CFG_QM_SRF_11 0xFC6DEC 1185 1186 #define mmTPC7_CFG_QM_SRF_12 0xFC6DF0 1187 1188 #define mmTPC7_CFG_QM_SRF_13 0xFC6DF4 1189 1190 #define mmTPC7_CFG_QM_SRF_14 0xFC6DF8 1191 1192 #define mmTPC7_CFG_QM_SRF_15 0xFC6DFC 1193 1194 #define mmTPC7_CFG_QM_SRF_16 0xFC6E00 1195 1196 #define mmTPC7_CFG_QM_SRF_17 0xFC6E04 1197 1198 #define mmTPC7_CFG_QM_SRF_18 0xFC6E08 1199 1200 #define mmTPC7_CFG_QM_SRF_19 0xFC6E0C 1201 1202 #define mmTPC7_CFG_QM_SRF_20 0xFC6E10 1203 1204 #define mmTPC7_CFG_QM_SRF_21 0xFC6E14 1205 1206 #define mmTPC7_CFG_QM_SRF_22 0xFC6E18 1207 1208 #define mmTPC7_CFG_QM_SRF_23 0xFC6E1C 1209 1210 #define mmTPC7_CFG_QM_SRF_24 0xFC6E20 1211 1212 #define mmTPC7_CFG_QM_SRF_25 0xFC6E24 1213 1214 #define mmTPC7_CFG_QM_SRF_26 0xFC6E28 1215 1216 #define mmTPC7_CFG_QM_SRF_27 0xFC6E2C 1217 1218 #define mmTPC7_CFG_QM_SRF_28 0xFC6E30 1219 1220 #define mmTPC7_CFG_QM_SRF_29 0xFC6E34 1221 1222 #define mmTPC7_CFG_QM_SRF_30 0xFC6E38 1223 1224 #define mmTPC7_CFG_QM_SRF_31 0xFC6E3C 1225 1226 #endif /* ASIC_REG_TPC7_CFG_REGS_H_ */ 1227