Searched refs:mmTPC5_QM_LBW_WR_RATE_LIM_CFG_0 (Results 1 – 2 of 2) sorted by relevance
810 #define mmTPC5_QM_LBW_WR_RATE_LIM_CFG_0 0xF48C98 macro
11823 mask |= 1U << ((mmTPC5_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()