1 /* SPDX-License-Identifier: GPL-2.0
2  *
3  * Copyright 2016-2018 HabanaLabs, Ltd.
4  * All Rights Reserved.
5  *
6  */
7 
8 /************************************
9  ** This is an auto-generated file **
10  **       DO NOT EDIT BELOW        **
11  ************************************/
12 
13 #ifndef ASIC_REG_TPC0_CFG_REGS_H_
14 #define ASIC_REG_TPC0_CFG_REGS_H_
15 
16 /*
17  *****************************************
18  *   TPC0_CFG (Prototype: TPC)
19  *****************************************
20  */
21 
22 #define mmTPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW                     0xE06400
23 
24 #define mmTPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH                    0xE06404
25 
26 #define mmTPC0_CFG_KERNEL_TENSOR_0_PADDING_VALUE                     0xE06408
27 
28 #define mmTPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG                     0xE0640C
29 
30 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_0_SIZE                        0xE06410
31 
32 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_0_STRIDE                      0xE06414
33 
34 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_1_SIZE                        0xE06418
35 
36 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_1_STRIDE                      0xE0641C
37 
38 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_2_SIZE                        0xE06420
39 
40 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_2_STRIDE                      0xE06424
41 
42 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_3_SIZE                        0xE06428
43 
44 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_3_STRIDE                      0xE0642C
45 
46 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_4_SIZE                        0xE06430
47 
48 #define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_4_STRIDE                      0xE06434
49 
50 #define mmTPC0_CFG_KERNEL_TENSOR_1_BASE_ADDR_LOW                     0xE06438
51 
52 #define mmTPC0_CFG_KERNEL_TENSOR_1_BASE_ADDR_HIGH                    0xE0643C
53 
54 #define mmTPC0_CFG_KERNEL_TENSOR_1_PADDING_VALUE                     0xE06440
55 
56 #define mmTPC0_CFG_KERNEL_TENSOR_1_TENSOR_CONFIG                     0xE06444
57 
58 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_0_SIZE                        0xE06448
59 
60 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_0_STRIDE                      0xE0644C
61 
62 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_1_SIZE                        0xE06450
63 
64 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_1_STRIDE                      0xE06454
65 
66 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_2_SIZE                        0xE06458
67 
68 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_2_STRIDE                      0xE0645C
69 
70 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_3_SIZE                        0xE06460
71 
72 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_3_STRIDE                      0xE06464
73 
74 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_4_SIZE                        0xE06468
75 
76 #define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_4_STRIDE                      0xE0646C
77 
78 #define mmTPC0_CFG_KERNEL_TENSOR_2_BASE_ADDR_LOW                     0xE06470
79 
80 #define mmTPC0_CFG_KERNEL_TENSOR_2_BASE_ADDR_HIGH                    0xE06474
81 
82 #define mmTPC0_CFG_KERNEL_TENSOR_2_PADDING_VALUE                     0xE06478
83 
84 #define mmTPC0_CFG_KERNEL_TENSOR_2_TENSOR_CONFIG                     0xE0647C
85 
86 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_0_SIZE                        0xE06480
87 
88 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_0_STRIDE                      0xE06484
89 
90 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_1_SIZE                        0xE06488
91 
92 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_1_STRIDE                      0xE0648C
93 
94 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_2_SIZE                        0xE06490
95 
96 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_2_STRIDE                      0xE06494
97 
98 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_3_SIZE                        0xE06498
99 
100 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_3_STRIDE                      0xE0649C
101 
102 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_4_SIZE                        0xE064A0
103 
104 #define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_4_STRIDE                      0xE064A4
105 
106 #define mmTPC0_CFG_KERNEL_TENSOR_3_BASE_ADDR_LOW                     0xE064A8
107 
108 #define mmTPC0_CFG_KERNEL_TENSOR_3_BASE_ADDR_HIGH                    0xE064AC
109 
110 #define mmTPC0_CFG_KERNEL_TENSOR_3_PADDING_VALUE                     0xE064B0
111 
112 #define mmTPC0_CFG_KERNEL_TENSOR_3_TENSOR_CONFIG                     0xE064B4
113 
114 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_0_SIZE                        0xE064B8
115 
116 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_0_STRIDE                      0xE064BC
117 
118 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_1_SIZE                        0xE064C0
119 
120 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_1_STRIDE                      0xE064C4
121 
122 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_2_SIZE                        0xE064C8
123 
124 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_2_STRIDE                      0xE064CC
125 
126 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_3_SIZE                        0xE064D0
127 
128 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_3_STRIDE                      0xE064D4
129 
130 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_4_SIZE                        0xE064D8
131 
132 #define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_4_STRIDE                      0xE064DC
133 
134 #define mmTPC0_CFG_KERNEL_TENSOR_4_BASE_ADDR_LOW                     0xE064E0
135 
136 #define mmTPC0_CFG_KERNEL_TENSOR_4_BASE_ADDR_HIGH                    0xE064E4
137 
138 #define mmTPC0_CFG_KERNEL_TENSOR_4_PADDING_VALUE                     0xE064E8
139 
140 #define mmTPC0_CFG_KERNEL_TENSOR_4_TENSOR_CONFIG                     0xE064EC
141 
142 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_0_SIZE                        0xE064F0
143 
144 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_0_STRIDE                      0xE064F4
145 
146 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_1_SIZE                        0xE064F8
147 
148 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_1_STRIDE                      0xE064FC
149 
150 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_2_SIZE                        0xE06500
151 
152 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_2_STRIDE                      0xE06504
153 
154 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_3_SIZE                        0xE06508
155 
156 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_3_STRIDE                      0xE0650C
157 
158 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_4_SIZE                        0xE06510
159 
160 #define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_4_STRIDE                      0xE06514
161 
162 #define mmTPC0_CFG_KERNEL_TENSOR_5_BASE_ADDR_LOW                     0xE06518
163 
164 #define mmTPC0_CFG_KERNEL_TENSOR_5_BASE_ADDR_HIGH                    0xE0651C
165 
166 #define mmTPC0_CFG_KERNEL_TENSOR_5_PADDING_VALUE                     0xE06520
167 
168 #define mmTPC0_CFG_KERNEL_TENSOR_5_TENSOR_CONFIG                     0xE06524
169 
170 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_0_SIZE                        0xE06528
171 
172 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_0_STRIDE                      0xE0652C
173 
174 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_1_SIZE                        0xE06530
175 
176 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_1_STRIDE                      0xE06534
177 
178 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_2_SIZE                        0xE06538
179 
180 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_2_STRIDE                      0xE0653C
181 
182 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_3_SIZE                        0xE06540
183 
184 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_3_STRIDE                      0xE06544
185 
186 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_4_SIZE                        0xE06548
187 
188 #define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_4_STRIDE                      0xE0654C
189 
190 #define mmTPC0_CFG_KERNEL_TENSOR_6_BASE_ADDR_LOW                     0xE06550
191 
192 #define mmTPC0_CFG_KERNEL_TENSOR_6_BASE_ADDR_HIGH                    0xE06554
193 
194 #define mmTPC0_CFG_KERNEL_TENSOR_6_PADDING_VALUE                     0xE06558
195 
196 #define mmTPC0_CFG_KERNEL_TENSOR_6_TENSOR_CONFIG                     0xE0655C
197 
198 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_0_SIZE                        0xE06560
199 
200 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_0_STRIDE                      0xE06564
201 
202 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_1_SIZE                        0xE06568
203 
204 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_1_STRIDE                      0xE0656C
205 
206 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_2_SIZE                        0xE06570
207 
208 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_2_STRIDE                      0xE06574
209 
210 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_3_SIZE                        0xE06578
211 
212 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_3_STRIDE                      0xE0657C
213 
214 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_4_SIZE                        0xE06580
215 
216 #define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_4_STRIDE                      0xE06584
217 
218 #define mmTPC0_CFG_KERNEL_TENSOR_7_BASE_ADDR_LOW                     0xE06588
219 
220 #define mmTPC0_CFG_KERNEL_TENSOR_7_BASE_ADDR_HIGH                    0xE0658C
221 
222 #define mmTPC0_CFG_KERNEL_TENSOR_7_PADDING_VALUE                     0xE06590
223 
224 #define mmTPC0_CFG_KERNEL_TENSOR_7_TENSOR_CONFIG                     0xE06594
225 
226 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_0_SIZE                        0xE06598
227 
228 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_0_STRIDE                      0xE0659C
229 
230 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_1_SIZE                        0xE065A0
231 
232 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_1_STRIDE                      0xE065A4
233 
234 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_2_SIZE                        0xE065A8
235 
236 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_2_STRIDE                      0xE065AC
237 
238 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_3_SIZE                        0xE065B0
239 
240 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_3_STRIDE                      0xE065B4
241 
242 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_4_SIZE                        0xE065B8
243 
244 #define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_4_STRIDE                      0xE065BC
245 
246 #define mmTPC0_CFG_KERNEL_TENSOR_8_BASE_ADDR_LOW                     0xE065C0
247 
248 #define mmTPC0_CFG_KERNEL_TENSOR_8_BASE_ADDR_HIGH                    0xE065C4
249 
250 #define mmTPC0_CFG_KERNEL_TENSOR_8_PADDING_VALUE                     0xE065C8
251 
252 #define mmTPC0_CFG_KERNEL_TENSOR_8_TENSOR_CONFIG                     0xE065CC
253 
254 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_0_SIZE                        0xE065D0
255 
256 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_0_STRIDE                      0xE065D4
257 
258 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_1_SIZE                        0xE065D8
259 
260 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_1_STRIDE                      0xE065DC
261 
262 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_2_SIZE                        0xE065E0
263 
264 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_2_STRIDE                      0xE065E4
265 
266 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_3_SIZE                        0xE065E8
267 
268 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_3_STRIDE                      0xE065EC
269 
270 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_4_SIZE                        0xE065F0
271 
272 #define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_4_STRIDE                      0xE065F4
273 
274 #define mmTPC0_CFG_KERNEL_TENSOR_9_BASE_ADDR_LOW                     0xE065F8
275 
276 #define mmTPC0_CFG_KERNEL_TENSOR_9_BASE_ADDR_HIGH                    0xE065FC
277 
278 #define mmTPC0_CFG_KERNEL_TENSOR_9_PADDING_VALUE                     0xE06600
279 
280 #define mmTPC0_CFG_KERNEL_TENSOR_9_TENSOR_CONFIG                     0xE06604
281 
282 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_0_SIZE                        0xE06608
283 
284 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_0_STRIDE                      0xE0660C
285 
286 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_1_SIZE                        0xE06610
287 
288 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_1_STRIDE                      0xE06614
289 
290 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_2_SIZE                        0xE06618
291 
292 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_2_STRIDE                      0xE0661C
293 
294 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_3_SIZE                        0xE06620
295 
296 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_3_STRIDE                      0xE06624
297 
298 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_4_SIZE                        0xE06628
299 
300 #define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_4_STRIDE                      0xE0662C
301 
302 #define mmTPC0_CFG_KERNEL_TENSOR_10_BASE_ADDR_LOW                    0xE06630
303 
304 #define mmTPC0_CFG_KERNEL_TENSOR_10_BASE_ADDR_HIGH                   0xE06634
305 
306 #define mmTPC0_CFG_KERNEL_TENSOR_10_PADDING_VALUE                    0xE06638
307 
308 #define mmTPC0_CFG_KERNEL_TENSOR_10_TENSOR_CONFIG                    0xE0663C
309 
310 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_0_SIZE                       0xE06640
311 
312 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_0_STRIDE                     0xE06644
313 
314 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_1_SIZE                       0xE06648
315 
316 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_1_STRIDE                     0xE0664C
317 
318 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_2_SIZE                       0xE06650
319 
320 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_2_STRIDE                     0xE06654
321 
322 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_3_SIZE                       0xE06658
323 
324 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_3_STRIDE                     0xE0665C
325 
326 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_4_SIZE                       0xE06660
327 
328 #define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_4_STRIDE                     0xE06664
329 
330 #define mmTPC0_CFG_KERNEL_TENSOR_11_BASE_ADDR_LOW                    0xE06668
331 
332 #define mmTPC0_CFG_KERNEL_TENSOR_11_BASE_ADDR_HIGH                   0xE0666C
333 
334 #define mmTPC0_CFG_KERNEL_TENSOR_11_PADDING_VALUE                    0xE06670
335 
336 #define mmTPC0_CFG_KERNEL_TENSOR_11_TENSOR_CONFIG                    0xE06674
337 
338 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_0_SIZE                       0xE06678
339 
340 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_0_STRIDE                     0xE0667C
341 
342 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_1_SIZE                       0xE06680
343 
344 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_1_STRIDE                     0xE06684
345 
346 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_2_SIZE                       0xE06688
347 
348 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_2_STRIDE                     0xE0668C
349 
350 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_3_SIZE                       0xE06690
351 
352 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_3_STRIDE                     0xE06694
353 
354 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_4_SIZE                       0xE06698
355 
356 #define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_4_STRIDE                     0xE0669C
357 
358 #define mmTPC0_CFG_KERNEL_TENSOR_12_BASE_ADDR_LOW                    0xE066A0
359 
360 #define mmTPC0_CFG_KERNEL_TENSOR_12_BASE_ADDR_HIGH                   0xE066A4
361 
362 #define mmTPC0_CFG_KERNEL_TENSOR_12_PADDING_VALUE                    0xE066A8
363 
364 #define mmTPC0_CFG_KERNEL_TENSOR_12_TENSOR_CONFIG                    0xE066AC
365 
366 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_0_SIZE                       0xE066B0
367 
368 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_0_STRIDE                     0xE066B4
369 
370 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_1_SIZE                       0xE066B8
371 
372 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_1_STRIDE                     0xE066BC
373 
374 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_2_SIZE                       0xE066C0
375 
376 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_2_STRIDE                     0xE066C4
377 
378 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_3_SIZE                       0xE066C8
379 
380 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_3_STRIDE                     0xE066CC
381 
382 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_4_SIZE                       0xE066D0
383 
384 #define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_4_STRIDE                     0xE066D4
385 
386 #define mmTPC0_CFG_KERNEL_TENSOR_13_BASE_ADDR_LOW                    0xE066D8
387 
388 #define mmTPC0_CFG_KERNEL_TENSOR_13_BASE_ADDR_HIGH                   0xE066DC
389 
390 #define mmTPC0_CFG_KERNEL_TENSOR_13_PADDING_VALUE                    0xE066E0
391 
392 #define mmTPC0_CFG_KERNEL_TENSOR_13_TENSOR_CONFIG                    0xE066E4
393 
394 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_0_SIZE                       0xE066E8
395 
396 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_0_STRIDE                     0xE066EC
397 
398 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_1_SIZE                       0xE066F0
399 
400 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_1_STRIDE                     0xE066F4
401 
402 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_2_SIZE                       0xE066F8
403 
404 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_2_STRIDE                     0xE066FC
405 
406 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_3_SIZE                       0xE06700
407 
408 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_3_STRIDE                     0xE06704
409 
410 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_4_SIZE                       0xE06708
411 
412 #define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_4_STRIDE                     0xE0670C
413 
414 #define mmTPC0_CFG_KERNEL_TENSOR_14_BASE_ADDR_LOW                    0xE06710
415 
416 #define mmTPC0_CFG_KERNEL_TENSOR_14_BASE_ADDR_HIGH                   0xE06714
417 
418 #define mmTPC0_CFG_KERNEL_TENSOR_14_PADDING_VALUE                    0xE06718
419 
420 #define mmTPC0_CFG_KERNEL_TENSOR_14_TENSOR_CONFIG                    0xE0671C
421 
422 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_0_SIZE                       0xE06720
423 
424 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_0_STRIDE                     0xE06724
425 
426 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_1_SIZE                       0xE06728
427 
428 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_1_STRIDE                     0xE0672C
429 
430 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_2_SIZE                       0xE06730
431 
432 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_2_STRIDE                     0xE06734
433 
434 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_3_SIZE                       0xE06738
435 
436 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_3_STRIDE                     0xE0673C
437 
438 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_4_SIZE                       0xE06740
439 
440 #define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_4_STRIDE                     0xE06744
441 
442 #define mmTPC0_CFG_KERNEL_TENSOR_15_BASE_ADDR_LOW                    0xE06748
443 
444 #define mmTPC0_CFG_KERNEL_TENSOR_15_BASE_ADDR_HIGH                   0xE0674C
445 
446 #define mmTPC0_CFG_KERNEL_TENSOR_15_PADDING_VALUE                    0xE06750
447 
448 #define mmTPC0_CFG_KERNEL_TENSOR_15_TENSOR_CONFIG                    0xE06754
449 
450 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_0_SIZE                       0xE06758
451 
452 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_0_STRIDE                     0xE0675C
453 
454 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_1_SIZE                       0xE06760
455 
456 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_1_STRIDE                     0xE06764
457 
458 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_2_SIZE                       0xE06768
459 
460 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_2_STRIDE                     0xE0676C
461 
462 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_3_SIZE                       0xE06770
463 
464 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_3_STRIDE                     0xE06774
465 
466 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_4_SIZE                       0xE06778
467 
468 #define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_4_STRIDE                     0xE0677C
469 
470 #define mmTPC0_CFG_KERNEL_SYNC_OBJECT_MESSAGE                        0xE06780
471 
472 #define mmTPC0_CFG_KERNEL_SYNC_OBJECT_ADDR                           0xE06784
473 
474 #define mmTPC0_CFG_KERNEL_KERNEL_BASE_ADDRESS_LOW                    0xE06788
475 
476 #define mmTPC0_CFG_KERNEL_KERNEL_BASE_ADDRESS_HIGH                   0xE0678C
477 
478 #define mmTPC0_CFG_KERNEL_TID_BASE_DIM_0                             0xE06790
479 
480 #define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_0                             0xE06794
481 
482 #define mmTPC0_CFG_KERNEL_TID_BASE_DIM_1                             0xE06798
483 
484 #define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_1                             0xE0679C
485 
486 #define mmTPC0_CFG_KERNEL_TID_BASE_DIM_2                             0xE067A0
487 
488 #define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_2                             0xE067A4
489 
490 #define mmTPC0_CFG_KERNEL_TID_BASE_DIM_3                             0xE067A8
491 
492 #define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_3                             0xE067AC
493 
494 #define mmTPC0_CFG_KERNEL_TID_BASE_DIM_4                             0xE067B0
495 
496 #define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_4                             0xE067B4
497 
498 #define mmTPC0_CFG_KERNEL_KERNEL_CONFIG                              0xE067B8
499 
500 #define mmTPC0_CFG_KERNEL_KERNEL_ID                                  0xE067BC
501 
502 #define mmTPC0_CFG_KERNEL_SRF_0                                      0xE067C0
503 
504 #define mmTPC0_CFG_KERNEL_SRF_1                                      0xE067C4
505 
506 #define mmTPC0_CFG_KERNEL_SRF_2                                      0xE067C8
507 
508 #define mmTPC0_CFG_KERNEL_SRF_3                                      0xE067CC
509 
510 #define mmTPC0_CFG_KERNEL_SRF_4                                      0xE067D0
511 
512 #define mmTPC0_CFG_KERNEL_SRF_5                                      0xE067D4
513 
514 #define mmTPC0_CFG_KERNEL_SRF_6                                      0xE067D8
515 
516 #define mmTPC0_CFG_KERNEL_SRF_7                                      0xE067DC
517 
518 #define mmTPC0_CFG_KERNEL_SRF_8                                      0xE067E0
519 
520 #define mmTPC0_CFG_KERNEL_SRF_9                                      0xE067E4
521 
522 #define mmTPC0_CFG_KERNEL_SRF_10                                     0xE067E8
523 
524 #define mmTPC0_CFG_KERNEL_SRF_11                                     0xE067EC
525 
526 #define mmTPC0_CFG_KERNEL_SRF_12                                     0xE067F0
527 
528 #define mmTPC0_CFG_KERNEL_SRF_13                                     0xE067F4
529 
530 #define mmTPC0_CFG_KERNEL_SRF_14                                     0xE067F8
531 
532 #define mmTPC0_CFG_KERNEL_SRF_15                                     0xE067FC
533 
534 #define mmTPC0_CFG_KERNEL_SRF_16                                     0xE06800
535 
536 #define mmTPC0_CFG_KERNEL_SRF_17                                     0xE06804
537 
538 #define mmTPC0_CFG_KERNEL_SRF_18                                     0xE06808
539 
540 #define mmTPC0_CFG_KERNEL_SRF_19                                     0xE0680C
541 
542 #define mmTPC0_CFG_KERNEL_SRF_20                                     0xE06810
543 
544 #define mmTPC0_CFG_KERNEL_SRF_21                                     0xE06814
545 
546 #define mmTPC0_CFG_KERNEL_SRF_22                                     0xE06818
547 
548 #define mmTPC0_CFG_KERNEL_SRF_23                                     0xE0681C
549 
550 #define mmTPC0_CFG_KERNEL_SRF_24                                     0xE06820
551 
552 #define mmTPC0_CFG_KERNEL_SRF_25                                     0xE06824
553 
554 #define mmTPC0_CFG_KERNEL_SRF_26                                     0xE06828
555 
556 #define mmTPC0_CFG_KERNEL_SRF_27                                     0xE0682C
557 
558 #define mmTPC0_CFG_KERNEL_SRF_28                                     0xE06830
559 
560 #define mmTPC0_CFG_KERNEL_SRF_29                                     0xE06834
561 
562 #define mmTPC0_CFG_KERNEL_SRF_30                                     0xE06838
563 
564 #define mmTPC0_CFG_KERNEL_SRF_31                                     0xE0683C
565 
566 #define mmTPC0_CFG_ROUND_CSR                                         0xE068FC
567 
568 #define mmTPC0_CFG_PROT                                              0xE06900
569 
570 #define mmTPC0_CFG_SEMAPHORE                                         0xE06908
571 
572 #define mmTPC0_CFG_VFLAGS                                            0xE0690C
573 
574 #define mmTPC0_CFG_SFLAGS                                            0xE06910
575 
576 #define mmTPC0_CFG_LFSR_POLYNOM                                      0xE06918
577 
578 #define mmTPC0_CFG_STATUS                                            0xE0691C
579 
580 #define mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH                             0xE06920
581 
582 #define mmTPC0_CFG_CFG_SUBTRACT_VALUE                                0xE06924
583 
584 #define mmTPC0_CFG_SM_BASE_ADDRESS_HIGH                              0xE0692C
585 
586 #define mmTPC0_CFG_TPC_CMD                                           0xE06930
587 
588 #define mmTPC0_CFG_TPC_EXECUTE                                       0xE06938
589 
590 #define mmTPC0_CFG_TPC_STALL                                         0xE0693C
591 
592 #define mmTPC0_CFG_ICACHE_BASE_ADDERESS_LOW                          0xE06940
593 
594 #define mmTPC0_CFG_ICACHE_BASE_ADDERESS_HIGH                         0xE06944
595 
596 #define mmTPC0_CFG_RD_RATE_LIMIT                                     0xE06948
597 
598 #define mmTPC0_CFG_WR_RATE_LIMIT                                     0xE06950
599 
600 #define mmTPC0_CFG_MSS_CONFIG                                        0xE06954
601 
602 #define mmTPC0_CFG_TPC_INTR_CAUSE                                    0xE06958
603 
604 #define mmTPC0_CFG_TPC_INTR_MASK                                     0xE0695C
605 
606 #define mmTPC0_CFG_WQ_CREDITS                                        0xE06960
607 
608 #define mmTPC0_CFG_ARUSER_LO                                         0xE06964
609 
610 #define mmTPC0_CFG_ARUSER_HI                                         0xE06968
611 
612 #define mmTPC0_CFG_AWUSER_LO                                         0xE0696C
613 
614 #define mmTPC0_CFG_AWUSER_HI                                         0xE06970
615 
616 #define mmTPC0_CFG_OPCODE_EXEC                                       0xE06974
617 
618 #define mmTPC0_CFG_LUT_FUNC32_BASE_ADDR_LO                           0xE06978
619 
620 #define mmTPC0_CFG_LUT_FUNC32_BASE_ADDR_HI                           0xE0697C
621 
622 #define mmTPC0_CFG_LUT_FUNC64_BASE_ADDR_LO                           0xE06980
623 
624 #define mmTPC0_CFG_LUT_FUNC64_BASE_ADDR_HI                           0xE06984
625 
626 #define mmTPC0_CFG_LUT_FUNC128_BASE_ADDR_LO                          0xE06988
627 
628 #define mmTPC0_CFG_LUT_FUNC128_BASE_ADDR_HI                          0xE0698C
629 
630 #define mmTPC0_CFG_LUT_FUNC256_BASE_ADDR_LO                          0xE06990
631 
632 #define mmTPC0_CFG_LUT_FUNC256_BASE_ADDR_HI                          0xE06994
633 
634 #define mmTPC0_CFG_TSB_CFG_MAX_SIZE                                  0xE06998
635 
636 #define mmTPC0_CFG_TSB_CFG                                           0xE0699C
637 
638 #define mmTPC0_CFG_DBGMEM_ADD                                        0xE069A0
639 
640 #define mmTPC0_CFG_DBGMEM_DATA_WR                                    0xE069A4
641 
642 #define mmTPC0_CFG_DBGMEM_DATA_RD                                    0xE069A8
643 
644 #define mmTPC0_CFG_DBGMEM_CTRL                                       0xE069AC
645 
646 #define mmTPC0_CFG_DBGMEM_RC                                         0xE069B0
647 
648 #define mmTPC0_CFG_TSB_INFLIGHT_CNTR                                 0xE069B4
649 
650 #define mmTPC0_CFG_WQ_INFLIGHT_CNTR                                  0xE069B8
651 
652 #define mmTPC0_CFG_WQ_LBW_TOTAL_CNTR                                 0xE069BC
653 
654 #define mmTPC0_CFG_WQ_HBW_TOTAL_CNTR                                 0xE069C0
655 
656 #define mmTPC0_CFG_IRQ_OCCOUPY_CNTR                                  0xE069C4
657 
658 #define mmTPC0_CFG_FUNC_MBIST_CNTRL                                  0xE069D0
659 
660 #define mmTPC0_CFG_FUNC_MBIST_PAT                                    0xE069D4
661 
662 #define mmTPC0_CFG_FUNC_MBIST_MEM_0                                  0xE069D8
663 
664 #define mmTPC0_CFG_FUNC_MBIST_MEM_1                                  0xE069DC
665 
666 #define mmTPC0_CFG_FUNC_MBIST_MEM_2                                  0xE069E0
667 
668 #define mmTPC0_CFG_FUNC_MBIST_MEM_3                                  0xE069E4
669 
670 #define mmTPC0_CFG_FUNC_MBIST_MEM_4                                  0xE069E8
671 
672 #define mmTPC0_CFG_FUNC_MBIST_MEM_5                                  0xE069EC
673 
674 #define mmTPC0_CFG_FUNC_MBIST_MEM_6                                  0xE069F0
675 
676 #define mmTPC0_CFG_FUNC_MBIST_MEM_7                                  0xE069F4
677 
678 #define mmTPC0_CFG_FUNC_MBIST_MEM_8                                  0xE069F8
679 
680 #define mmTPC0_CFG_FUNC_MBIST_MEM_9                                  0xE069FC
681 
682 #define mmTPC0_CFG_QM_TENSOR_0_BASE_ADDR_LOW                         0xE06A00
683 
684 #define mmTPC0_CFG_QM_TENSOR_0_BASE_ADDR_HIGH                        0xE06A04
685 
686 #define mmTPC0_CFG_QM_TENSOR_0_PADDING_VALUE                         0xE06A08
687 
688 #define mmTPC0_CFG_QM_TENSOR_0_TENSOR_CONFIG                         0xE06A0C
689 
690 #define mmTPC0_CFG_QM_TENSOR_0_DIM_0_SIZE                            0xE06A10
691 
692 #define mmTPC0_CFG_QM_TENSOR_0_DIM_0_STRIDE                          0xE06A14
693 
694 #define mmTPC0_CFG_QM_TENSOR_0_DIM_1_SIZE                            0xE06A18
695 
696 #define mmTPC0_CFG_QM_TENSOR_0_DIM_1_STRIDE                          0xE06A1C
697 
698 #define mmTPC0_CFG_QM_TENSOR_0_DIM_2_SIZE                            0xE06A20
699 
700 #define mmTPC0_CFG_QM_TENSOR_0_DIM_2_STRIDE                          0xE06A24
701 
702 #define mmTPC0_CFG_QM_TENSOR_0_DIM_3_SIZE                            0xE06A28
703 
704 #define mmTPC0_CFG_QM_TENSOR_0_DIM_3_STRIDE                          0xE06A2C
705 
706 #define mmTPC0_CFG_QM_TENSOR_0_DIM_4_SIZE                            0xE06A30
707 
708 #define mmTPC0_CFG_QM_TENSOR_0_DIM_4_STRIDE                          0xE06A34
709 
710 #define mmTPC0_CFG_QM_TENSOR_1_BASE_ADDR_LOW                         0xE06A38
711 
712 #define mmTPC0_CFG_QM_TENSOR_1_BASE_ADDR_HIGH                        0xE06A3C
713 
714 #define mmTPC0_CFG_QM_TENSOR_1_PADDING_VALUE                         0xE06A40
715 
716 #define mmTPC0_CFG_QM_TENSOR_1_TENSOR_CONFIG                         0xE06A44
717 
718 #define mmTPC0_CFG_QM_TENSOR_1_DIM_0_SIZE                            0xE06A48
719 
720 #define mmTPC0_CFG_QM_TENSOR_1_DIM_0_STRIDE                          0xE06A4C
721 
722 #define mmTPC0_CFG_QM_TENSOR_1_DIM_1_SIZE                            0xE06A50
723 
724 #define mmTPC0_CFG_QM_TENSOR_1_DIM_1_STRIDE                          0xE06A54
725 
726 #define mmTPC0_CFG_QM_TENSOR_1_DIM_2_SIZE                            0xE06A58
727 
728 #define mmTPC0_CFG_QM_TENSOR_1_DIM_2_STRIDE                          0xE06A5C
729 
730 #define mmTPC0_CFG_QM_TENSOR_1_DIM_3_SIZE                            0xE06A60
731 
732 #define mmTPC0_CFG_QM_TENSOR_1_DIM_3_STRIDE                          0xE06A64
733 
734 #define mmTPC0_CFG_QM_TENSOR_1_DIM_4_SIZE                            0xE06A68
735 
736 #define mmTPC0_CFG_QM_TENSOR_1_DIM_4_STRIDE                          0xE06A6C
737 
738 #define mmTPC0_CFG_QM_TENSOR_2_BASE_ADDR_LOW                         0xE06A70
739 
740 #define mmTPC0_CFG_QM_TENSOR_2_BASE_ADDR_HIGH                        0xE06A74
741 
742 #define mmTPC0_CFG_QM_TENSOR_2_PADDING_VALUE                         0xE06A78
743 
744 #define mmTPC0_CFG_QM_TENSOR_2_TENSOR_CONFIG                         0xE06A7C
745 
746 #define mmTPC0_CFG_QM_TENSOR_2_DIM_0_SIZE                            0xE06A80
747 
748 #define mmTPC0_CFG_QM_TENSOR_2_DIM_0_STRIDE                          0xE06A84
749 
750 #define mmTPC0_CFG_QM_TENSOR_2_DIM_1_SIZE                            0xE06A88
751 
752 #define mmTPC0_CFG_QM_TENSOR_2_DIM_1_STRIDE                          0xE06A8C
753 
754 #define mmTPC0_CFG_QM_TENSOR_2_DIM_2_SIZE                            0xE06A90
755 
756 #define mmTPC0_CFG_QM_TENSOR_2_DIM_2_STRIDE                          0xE06A94
757 
758 #define mmTPC0_CFG_QM_TENSOR_2_DIM_3_SIZE                            0xE06A98
759 
760 #define mmTPC0_CFG_QM_TENSOR_2_DIM_3_STRIDE                          0xE06A9C
761 
762 #define mmTPC0_CFG_QM_TENSOR_2_DIM_4_SIZE                            0xE06AA0
763 
764 #define mmTPC0_CFG_QM_TENSOR_2_DIM_4_STRIDE                          0xE06AA4
765 
766 #define mmTPC0_CFG_QM_TENSOR_3_BASE_ADDR_LOW                         0xE06AA8
767 
768 #define mmTPC0_CFG_QM_TENSOR_3_BASE_ADDR_HIGH                        0xE06AAC
769 
770 #define mmTPC0_CFG_QM_TENSOR_3_PADDING_VALUE                         0xE06AB0
771 
772 #define mmTPC0_CFG_QM_TENSOR_3_TENSOR_CONFIG                         0xE06AB4
773 
774 #define mmTPC0_CFG_QM_TENSOR_3_DIM_0_SIZE                            0xE06AB8
775 
776 #define mmTPC0_CFG_QM_TENSOR_3_DIM_0_STRIDE                          0xE06ABC
777 
778 #define mmTPC0_CFG_QM_TENSOR_3_DIM_1_SIZE                            0xE06AC0
779 
780 #define mmTPC0_CFG_QM_TENSOR_3_DIM_1_STRIDE                          0xE06AC4
781 
782 #define mmTPC0_CFG_QM_TENSOR_3_DIM_2_SIZE                            0xE06AC8
783 
784 #define mmTPC0_CFG_QM_TENSOR_3_DIM_2_STRIDE                          0xE06ACC
785 
786 #define mmTPC0_CFG_QM_TENSOR_3_DIM_3_SIZE                            0xE06AD0
787 
788 #define mmTPC0_CFG_QM_TENSOR_3_DIM_3_STRIDE                          0xE06AD4
789 
790 #define mmTPC0_CFG_QM_TENSOR_3_DIM_4_SIZE                            0xE06AD8
791 
792 #define mmTPC0_CFG_QM_TENSOR_3_DIM_4_STRIDE                          0xE06ADC
793 
794 #define mmTPC0_CFG_QM_TENSOR_4_BASE_ADDR_LOW                         0xE06AE0
795 
796 #define mmTPC0_CFG_QM_TENSOR_4_BASE_ADDR_HIGH                        0xE06AE4
797 
798 #define mmTPC0_CFG_QM_TENSOR_4_PADDING_VALUE                         0xE06AE8
799 
800 #define mmTPC0_CFG_QM_TENSOR_4_TENSOR_CONFIG                         0xE06AEC
801 
802 #define mmTPC0_CFG_QM_TENSOR_4_DIM_0_SIZE                            0xE06AF0
803 
804 #define mmTPC0_CFG_QM_TENSOR_4_DIM_0_STRIDE                          0xE06AF4
805 
806 #define mmTPC0_CFG_QM_TENSOR_4_DIM_1_SIZE                            0xE06AF8
807 
808 #define mmTPC0_CFG_QM_TENSOR_4_DIM_1_STRIDE                          0xE06AFC
809 
810 #define mmTPC0_CFG_QM_TENSOR_4_DIM_2_SIZE                            0xE06B00
811 
812 #define mmTPC0_CFG_QM_TENSOR_4_DIM_2_STRIDE                          0xE06B04
813 
814 #define mmTPC0_CFG_QM_TENSOR_4_DIM_3_SIZE                            0xE06B08
815 
816 #define mmTPC0_CFG_QM_TENSOR_4_DIM_3_STRIDE                          0xE06B0C
817 
818 #define mmTPC0_CFG_QM_TENSOR_4_DIM_4_SIZE                            0xE06B10
819 
820 #define mmTPC0_CFG_QM_TENSOR_4_DIM_4_STRIDE                          0xE06B14
821 
822 #define mmTPC0_CFG_QM_TENSOR_5_BASE_ADDR_LOW                         0xE06B18
823 
824 #define mmTPC0_CFG_QM_TENSOR_5_BASE_ADDR_HIGH                        0xE06B1C
825 
826 #define mmTPC0_CFG_QM_TENSOR_5_PADDING_VALUE                         0xE06B20
827 
828 #define mmTPC0_CFG_QM_TENSOR_5_TENSOR_CONFIG                         0xE06B24
829 
830 #define mmTPC0_CFG_QM_TENSOR_5_DIM_0_SIZE                            0xE06B28
831 
832 #define mmTPC0_CFG_QM_TENSOR_5_DIM_0_STRIDE                          0xE06B2C
833 
834 #define mmTPC0_CFG_QM_TENSOR_5_DIM_1_SIZE                            0xE06B30
835 
836 #define mmTPC0_CFG_QM_TENSOR_5_DIM_1_STRIDE                          0xE06B34
837 
838 #define mmTPC0_CFG_QM_TENSOR_5_DIM_2_SIZE                            0xE06B38
839 
840 #define mmTPC0_CFG_QM_TENSOR_5_DIM_2_STRIDE                          0xE06B3C
841 
842 #define mmTPC0_CFG_QM_TENSOR_5_DIM_3_SIZE                            0xE06B40
843 
844 #define mmTPC0_CFG_QM_TENSOR_5_DIM_3_STRIDE                          0xE06B44
845 
846 #define mmTPC0_CFG_QM_TENSOR_5_DIM_4_SIZE                            0xE06B48
847 
848 #define mmTPC0_CFG_QM_TENSOR_5_DIM_4_STRIDE                          0xE06B4C
849 
850 #define mmTPC0_CFG_QM_TENSOR_6_BASE_ADDR_LOW                         0xE06B50
851 
852 #define mmTPC0_CFG_QM_TENSOR_6_BASE_ADDR_HIGH                        0xE06B54
853 
854 #define mmTPC0_CFG_QM_TENSOR_6_PADDING_VALUE                         0xE06B58
855 
856 #define mmTPC0_CFG_QM_TENSOR_6_TENSOR_CONFIG                         0xE06B5C
857 
858 #define mmTPC0_CFG_QM_TENSOR_6_DIM_0_SIZE                            0xE06B60
859 
860 #define mmTPC0_CFG_QM_TENSOR_6_DIM_0_STRIDE                          0xE06B64
861 
862 #define mmTPC0_CFG_QM_TENSOR_6_DIM_1_SIZE                            0xE06B68
863 
864 #define mmTPC0_CFG_QM_TENSOR_6_DIM_1_STRIDE                          0xE06B6C
865 
866 #define mmTPC0_CFG_QM_TENSOR_6_DIM_2_SIZE                            0xE06B70
867 
868 #define mmTPC0_CFG_QM_TENSOR_6_DIM_2_STRIDE                          0xE06B74
869 
870 #define mmTPC0_CFG_QM_TENSOR_6_DIM_3_SIZE                            0xE06B78
871 
872 #define mmTPC0_CFG_QM_TENSOR_6_DIM_3_STRIDE                          0xE06B7C
873 
874 #define mmTPC0_CFG_QM_TENSOR_6_DIM_4_SIZE                            0xE06B80
875 
876 #define mmTPC0_CFG_QM_TENSOR_6_DIM_4_STRIDE                          0xE06B84
877 
878 #define mmTPC0_CFG_QM_TENSOR_7_BASE_ADDR_LOW                         0xE06B88
879 
880 #define mmTPC0_CFG_QM_TENSOR_7_BASE_ADDR_HIGH                        0xE06B8C
881 
882 #define mmTPC0_CFG_QM_TENSOR_7_PADDING_VALUE                         0xE06B90
883 
884 #define mmTPC0_CFG_QM_TENSOR_7_TENSOR_CONFIG                         0xE06B94
885 
886 #define mmTPC0_CFG_QM_TENSOR_7_DIM_0_SIZE                            0xE06B98
887 
888 #define mmTPC0_CFG_QM_TENSOR_7_DIM_0_STRIDE                          0xE06B9C
889 
890 #define mmTPC0_CFG_QM_TENSOR_7_DIM_1_SIZE                            0xE06BA0
891 
892 #define mmTPC0_CFG_QM_TENSOR_7_DIM_1_STRIDE                          0xE06BA4
893 
894 #define mmTPC0_CFG_QM_TENSOR_7_DIM_2_SIZE                            0xE06BA8
895 
896 #define mmTPC0_CFG_QM_TENSOR_7_DIM_2_STRIDE                          0xE06BAC
897 
898 #define mmTPC0_CFG_QM_TENSOR_7_DIM_3_SIZE                            0xE06BB0
899 
900 #define mmTPC0_CFG_QM_TENSOR_7_DIM_3_STRIDE                          0xE06BB4
901 
902 #define mmTPC0_CFG_QM_TENSOR_7_DIM_4_SIZE                            0xE06BB8
903 
904 #define mmTPC0_CFG_QM_TENSOR_7_DIM_4_STRIDE                          0xE06BBC
905 
906 #define mmTPC0_CFG_QM_TENSOR_8_BASE_ADDR_LOW                         0xE06BC0
907 
908 #define mmTPC0_CFG_QM_TENSOR_8_BASE_ADDR_HIGH                        0xE06BC4
909 
910 #define mmTPC0_CFG_QM_TENSOR_8_PADDING_VALUE                         0xE06BC8
911 
912 #define mmTPC0_CFG_QM_TENSOR_8_TENSOR_CONFIG                         0xE06BCC
913 
914 #define mmTPC0_CFG_QM_TENSOR_8_DIM_0_SIZE                            0xE06BD0
915 
916 #define mmTPC0_CFG_QM_TENSOR_8_DIM_0_STRIDE                          0xE06BD4
917 
918 #define mmTPC0_CFG_QM_TENSOR_8_DIM_1_SIZE                            0xE06BD8
919 
920 #define mmTPC0_CFG_QM_TENSOR_8_DIM_1_STRIDE                          0xE06BDC
921 
922 #define mmTPC0_CFG_QM_TENSOR_8_DIM_2_SIZE                            0xE06BE0
923 
924 #define mmTPC0_CFG_QM_TENSOR_8_DIM_2_STRIDE                          0xE06BE4
925 
926 #define mmTPC0_CFG_QM_TENSOR_8_DIM_3_SIZE                            0xE06BE8
927 
928 #define mmTPC0_CFG_QM_TENSOR_8_DIM_3_STRIDE                          0xE06BEC
929 
930 #define mmTPC0_CFG_QM_TENSOR_8_DIM_4_SIZE                            0xE06BF0
931 
932 #define mmTPC0_CFG_QM_TENSOR_8_DIM_4_STRIDE                          0xE06BF4
933 
934 #define mmTPC0_CFG_QM_TENSOR_9_BASE_ADDR_LOW                         0xE06BF8
935 
936 #define mmTPC0_CFG_QM_TENSOR_9_BASE_ADDR_HIGH                        0xE06BFC
937 
938 #define mmTPC0_CFG_QM_TENSOR_9_PADDING_VALUE                         0xE06C00
939 
940 #define mmTPC0_CFG_QM_TENSOR_9_TENSOR_CONFIG                         0xE06C04
941 
942 #define mmTPC0_CFG_QM_TENSOR_9_DIM_0_SIZE                            0xE06C08
943 
944 #define mmTPC0_CFG_QM_TENSOR_9_DIM_0_STRIDE                          0xE06C0C
945 
946 #define mmTPC0_CFG_QM_TENSOR_9_DIM_1_SIZE                            0xE06C10
947 
948 #define mmTPC0_CFG_QM_TENSOR_9_DIM_1_STRIDE                          0xE06C14
949 
950 #define mmTPC0_CFG_QM_TENSOR_9_DIM_2_SIZE                            0xE06C18
951 
952 #define mmTPC0_CFG_QM_TENSOR_9_DIM_2_STRIDE                          0xE06C1C
953 
954 #define mmTPC0_CFG_QM_TENSOR_9_DIM_3_SIZE                            0xE06C20
955 
956 #define mmTPC0_CFG_QM_TENSOR_9_DIM_3_STRIDE                          0xE06C24
957 
958 #define mmTPC0_CFG_QM_TENSOR_9_DIM_4_SIZE                            0xE06C28
959 
960 #define mmTPC0_CFG_QM_TENSOR_9_DIM_4_STRIDE                          0xE06C2C
961 
962 #define mmTPC0_CFG_QM_TENSOR_10_BASE_ADDR_LOW                        0xE06C30
963 
964 #define mmTPC0_CFG_QM_TENSOR_10_BASE_ADDR_HIGH                       0xE06C34
965 
966 #define mmTPC0_CFG_QM_TENSOR_10_PADDING_VALUE                        0xE06C38
967 
968 #define mmTPC0_CFG_QM_TENSOR_10_TENSOR_CONFIG                        0xE06C3C
969 
970 #define mmTPC0_CFG_QM_TENSOR_10_DIM_0_SIZE                           0xE06C40
971 
972 #define mmTPC0_CFG_QM_TENSOR_10_DIM_0_STRIDE                         0xE06C44
973 
974 #define mmTPC0_CFG_QM_TENSOR_10_DIM_1_SIZE                           0xE06C48
975 
976 #define mmTPC0_CFG_QM_TENSOR_10_DIM_1_STRIDE                         0xE06C4C
977 
978 #define mmTPC0_CFG_QM_TENSOR_10_DIM_2_SIZE                           0xE06C50
979 
980 #define mmTPC0_CFG_QM_TENSOR_10_DIM_2_STRIDE                         0xE06C54
981 
982 #define mmTPC0_CFG_QM_TENSOR_10_DIM_3_SIZE                           0xE06C58
983 
984 #define mmTPC0_CFG_QM_TENSOR_10_DIM_3_STRIDE                         0xE06C5C
985 
986 #define mmTPC0_CFG_QM_TENSOR_10_DIM_4_SIZE                           0xE06C60
987 
988 #define mmTPC0_CFG_QM_TENSOR_10_DIM_4_STRIDE                         0xE06C64
989 
990 #define mmTPC0_CFG_QM_TENSOR_11_BASE_ADDR_LOW                        0xE06C68
991 
992 #define mmTPC0_CFG_QM_TENSOR_11_BASE_ADDR_HIGH                       0xE06C6C
993 
994 #define mmTPC0_CFG_QM_TENSOR_11_PADDING_VALUE                        0xE06C70
995 
996 #define mmTPC0_CFG_QM_TENSOR_11_TENSOR_CONFIG                        0xE06C74
997 
998 #define mmTPC0_CFG_QM_TENSOR_11_DIM_0_SIZE                           0xE06C78
999 
1000 #define mmTPC0_CFG_QM_TENSOR_11_DIM_0_STRIDE                         0xE06C7C
1001 
1002 #define mmTPC0_CFG_QM_TENSOR_11_DIM_1_SIZE                           0xE06C80
1003 
1004 #define mmTPC0_CFG_QM_TENSOR_11_DIM_1_STRIDE                         0xE06C84
1005 
1006 #define mmTPC0_CFG_QM_TENSOR_11_DIM_2_SIZE                           0xE06C88
1007 
1008 #define mmTPC0_CFG_QM_TENSOR_11_DIM_2_STRIDE                         0xE06C8C
1009 
1010 #define mmTPC0_CFG_QM_TENSOR_11_DIM_3_SIZE                           0xE06C90
1011 
1012 #define mmTPC0_CFG_QM_TENSOR_11_DIM_3_STRIDE                         0xE06C94
1013 
1014 #define mmTPC0_CFG_QM_TENSOR_11_DIM_4_SIZE                           0xE06C98
1015 
1016 #define mmTPC0_CFG_QM_TENSOR_11_DIM_4_STRIDE                         0xE06C9C
1017 
1018 #define mmTPC0_CFG_QM_TENSOR_12_BASE_ADDR_LOW                        0xE06CA0
1019 
1020 #define mmTPC0_CFG_QM_TENSOR_12_BASE_ADDR_HIGH                       0xE06CA4
1021 
1022 #define mmTPC0_CFG_QM_TENSOR_12_PADDING_VALUE                        0xE06CA8
1023 
1024 #define mmTPC0_CFG_QM_TENSOR_12_TENSOR_CONFIG                        0xE06CAC
1025 
1026 #define mmTPC0_CFG_QM_TENSOR_12_DIM_0_SIZE                           0xE06CB0
1027 
1028 #define mmTPC0_CFG_QM_TENSOR_12_DIM_0_STRIDE                         0xE06CB4
1029 
1030 #define mmTPC0_CFG_QM_TENSOR_12_DIM_1_SIZE                           0xE06CB8
1031 
1032 #define mmTPC0_CFG_QM_TENSOR_12_DIM_1_STRIDE                         0xE06CBC
1033 
1034 #define mmTPC0_CFG_QM_TENSOR_12_DIM_2_SIZE                           0xE06CC0
1035 
1036 #define mmTPC0_CFG_QM_TENSOR_12_DIM_2_STRIDE                         0xE06CC4
1037 
1038 #define mmTPC0_CFG_QM_TENSOR_12_DIM_3_SIZE                           0xE06CC8
1039 
1040 #define mmTPC0_CFG_QM_TENSOR_12_DIM_3_STRIDE                         0xE06CCC
1041 
1042 #define mmTPC0_CFG_QM_TENSOR_12_DIM_4_SIZE                           0xE06CD0
1043 
1044 #define mmTPC0_CFG_QM_TENSOR_12_DIM_4_STRIDE                         0xE06CD4
1045 
1046 #define mmTPC0_CFG_QM_TENSOR_13_BASE_ADDR_LOW                        0xE06CD8
1047 
1048 #define mmTPC0_CFG_QM_TENSOR_13_BASE_ADDR_HIGH                       0xE06CDC
1049 
1050 #define mmTPC0_CFG_QM_TENSOR_13_PADDING_VALUE                        0xE06CE0
1051 
1052 #define mmTPC0_CFG_QM_TENSOR_13_TENSOR_CONFIG                        0xE06CE4
1053 
1054 #define mmTPC0_CFG_QM_TENSOR_13_DIM_0_SIZE                           0xE06CE8
1055 
1056 #define mmTPC0_CFG_QM_TENSOR_13_DIM_0_STRIDE                         0xE06CEC
1057 
1058 #define mmTPC0_CFG_QM_TENSOR_13_DIM_1_SIZE                           0xE06CF0
1059 
1060 #define mmTPC0_CFG_QM_TENSOR_13_DIM_1_STRIDE                         0xE06CF4
1061 
1062 #define mmTPC0_CFG_QM_TENSOR_13_DIM_2_SIZE                           0xE06CF8
1063 
1064 #define mmTPC0_CFG_QM_TENSOR_13_DIM_2_STRIDE                         0xE06CFC
1065 
1066 #define mmTPC0_CFG_QM_TENSOR_13_DIM_3_SIZE                           0xE06D00
1067 
1068 #define mmTPC0_CFG_QM_TENSOR_13_DIM_3_STRIDE                         0xE06D04
1069 
1070 #define mmTPC0_CFG_QM_TENSOR_13_DIM_4_SIZE                           0xE06D08
1071 
1072 #define mmTPC0_CFG_QM_TENSOR_13_DIM_4_STRIDE                         0xE06D0C
1073 
1074 #define mmTPC0_CFG_QM_TENSOR_14_BASE_ADDR_LOW                        0xE06D10
1075 
1076 #define mmTPC0_CFG_QM_TENSOR_14_BASE_ADDR_HIGH                       0xE06D14
1077 
1078 #define mmTPC0_CFG_QM_TENSOR_14_PADDING_VALUE                        0xE06D18
1079 
1080 #define mmTPC0_CFG_QM_TENSOR_14_TENSOR_CONFIG                        0xE06D1C
1081 
1082 #define mmTPC0_CFG_QM_TENSOR_14_DIM_0_SIZE                           0xE06D20
1083 
1084 #define mmTPC0_CFG_QM_TENSOR_14_DIM_0_STRIDE                         0xE06D24
1085 
1086 #define mmTPC0_CFG_QM_TENSOR_14_DIM_1_SIZE                           0xE06D28
1087 
1088 #define mmTPC0_CFG_QM_TENSOR_14_DIM_1_STRIDE                         0xE06D2C
1089 
1090 #define mmTPC0_CFG_QM_TENSOR_14_DIM_2_SIZE                           0xE06D30
1091 
1092 #define mmTPC0_CFG_QM_TENSOR_14_DIM_2_STRIDE                         0xE06D34
1093 
1094 #define mmTPC0_CFG_QM_TENSOR_14_DIM_3_SIZE                           0xE06D38
1095 
1096 #define mmTPC0_CFG_QM_TENSOR_14_DIM_3_STRIDE                         0xE06D3C
1097 
1098 #define mmTPC0_CFG_QM_TENSOR_14_DIM_4_SIZE                           0xE06D40
1099 
1100 #define mmTPC0_CFG_QM_TENSOR_14_DIM_4_STRIDE                         0xE06D44
1101 
1102 #define mmTPC0_CFG_QM_TENSOR_15_BASE_ADDR_LOW                        0xE06D48
1103 
1104 #define mmTPC0_CFG_QM_TENSOR_15_BASE_ADDR_HIGH                       0xE06D4C
1105 
1106 #define mmTPC0_CFG_QM_TENSOR_15_PADDING_VALUE                        0xE06D50
1107 
1108 #define mmTPC0_CFG_QM_TENSOR_15_TENSOR_CONFIG                        0xE06D54
1109 
1110 #define mmTPC0_CFG_QM_TENSOR_15_DIM_0_SIZE                           0xE06D58
1111 
1112 #define mmTPC0_CFG_QM_TENSOR_15_DIM_0_STRIDE                         0xE06D5C
1113 
1114 #define mmTPC0_CFG_QM_TENSOR_15_DIM_1_SIZE                           0xE06D60
1115 
1116 #define mmTPC0_CFG_QM_TENSOR_15_DIM_1_STRIDE                         0xE06D64
1117 
1118 #define mmTPC0_CFG_QM_TENSOR_15_DIM_2_SIZE                           0xE06D68
1119 
1120 #define mmTPC0_CFG_QM_TENSOR_15_DIM_2_STRIDE                         0xE06D6C
1121 
1122 #define mmTPC0_CFG_QM_TENSOR_15_DIM_3_SIZE                           0xE06D70
1123 
1124 #define mmTPC0_CFG_QM_TENSOR_15_DIM_3_STRIDE                         0xE06D74
1125 
1126 #define mmTPC0_CFG_QM_TENSOR_15_DIM_4_SIZE                           0xE06D78
1127 
1128 #define mmTPC0_CFG_QM_TENSOR_15_DIM_4_STRIDE                         0xE06D7C
1129 
1130 #define mmTPC0_CFG_QM_SYNC_OBJECT_MESSAGE                            0xE06D80
1131 
1132 #define mmTPC0_CFG_QM_SYNC_OBJECT_ADDR                               0xE06D84
1133 
1134 #define mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_LOW                        0xE06D88
1135 
1136 #define mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_HIGH                       0xE06D8C
1137 
1138 #define mmTPC0_CFG_QM_TID_BASE_DIM_0                                 0xE06D90
1139 
1140 #define mmTPC0_CFG_QM_TID_SIZE_DIM_0                                 0xE06D94
1141 
1142 #define mmTPC0_CFG_QM_TID_BASE_DIM_1                                 0xE06D98
1143 
1144 #define mmTPC0_CFG_QM_TID_SIZE_DIM_1                                 0xE06D9C
1145 
1146 #define mmTPC0_CFG_QM_TID_BASE_DIM_2                                 0xE06DA0
1147 
1148 #define mmTPC0_CFG_QM_TID_SIZE_DIM_2                                 0xE06DA4
1149 
1150 #define mmTPC0_CFG_QM_TID_BASE_DIM_3                                 0xE06DA8
1151 
1152 #define mmTPC0_CFG_QM_TID_SIZE_DIM_3                                 0xE06DAC
1153 
1154 #define mmTPC0_CFG_QM_TID_BASE_DIM_4                                 0xE06DB0
1155 
1156 #define mmTPC0_CFG_QM_TID_SIZE_DIM_4                                 0xE06DB4
1157 
1158 #define mmTPC0_CFG_QM_KERNEL_CONFIG                                  0xE06DB8
1159 
1160 #define mmTPC0_CFG_QM_KERNEL_ID                                      0xE06DBC
1161 
1162 #define mmTPC0_CFG_QM_SRF_0                                          0xE06DC0
1163 
1164 #define mmTPC0_CFG_QM_SRF_1                                          0xE06DC4
1165 
1166 #define mmTPC0_CFG_QM_SRF_2                                          0xE06DC8
1167 
1168 #define mmTPC0_CFG_QM_SRF_3                                          0xE06DCC
1169 
1170 #define mmTPC0_CFG_QM_SRF_4                                          0xE06DD0
1171 
1172 #define mmTPC0_CFG_QM_SRF_5                                          0xE06DD4
1173 
1174 #define mmTPC0_CFG_QM_SRF_6                                          0xE06DD8
1175 
1176 #define mmTPC0_CFG_QM_SRF_7                                          0xE06DDC
1177 
1178 #define mmTPC0_CFG_QM_SRF_8                                          0xE06DE0
1179 
1180 #define mmTPC0_CFG_QM_SRF_9                                          0xE06DE4
1181 
1182 #define mmTPC0_CFG_QM_SRF_10                                         0xE06DE8
1183 
1184 #define mmTPC0_CFG_QM_SRF_11                                         0xE06DEC
1185 
1186 #define mmTPC0_CFG_QM_SRF_12                                         0xE06DF0
1187 
1188 #define mmTPC0_CFG_QM_SRF_13                                         0xE06DF4
1189 
1190 #define mmTPC0_CFG_QM_SRF_14                                         0xE06DF8
1191 
1192 #define mmTPC0_CFG_QM_SRF_15                                         0xE06DFC
1193 
1194 #define mmTPC0_CFG_QM_SRF_16                                         0xE06E00
1195 
1196 #define mmTPC0_CFG_QM_SRF_17                                         0xE06E04
1197 
1198 #define mmTPC0_CFG_QM_SRF_18                                         0xE06E08
1199 
1200 #define mmTPC0_CFG_QM_SRF_19                                         0xE06E0C
1201 
1202 #define mmTPC0_CFG_QM_SRF_20                                         0xE06E10
1203 
1204 #define mmTPC0_CFG_QM_SRF_21                                         0xE06E14
1205 
1206 #define mmTPC0_CFG_QM_SRF_22                                         0xE06E18
1207 
1208 #define mmTPC0_CFG_QM_SRF_23                                         0xE06E1C
1209 
1210 #define mmTPC0_CFG_QM_SRF_24                                         0xE06E20
1211 
1212 #define mmTPC0_CFG_QM_SRF_25                                         0xE06E24
1213 
1214 #define mmTPC0_CFG_QM_SRF_26                                         0xE06E28
1215 
1216 #define mmTPC0_CFG_QM_SRF_27                                         0xE06E2C
1217 
1218 #define mmTPC0_CFG_QM_SRF_28                                         0xE06E30
1219 
1220 #define mmTPC0_CFG_QM_SRF_29                                         0xE06E34
1221 
1222 #define mmTPC0_CFG_QM_SRF_30                                         0xE06E38
1223 
1224 #define mmTPC0_CFG_QM_SRF_31                                         0xE06E3C
1225 
1226 #endif /* ASIC_REG_TPC0_CFG_REGS_H_ */
1227