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Searched refs:mmTCP_WATCH0_ADDR_H (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v10.c189 uint32_t retval = SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_H) -
190 mmTCP_WATCH0_ADDR_H;
883 #define TCP_WATCH_STRIDE (mmTCP_WATCH1_ADDR_H - mmTCP_WATCH0_ADDR_H)
924 WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_H) + in kgd_gfx_v10_set_address_watch()
Damdgpu_amdkfd_gfx_v9.c819 #define TCP_WATCH_STRIDE (mmTCP_WATCH1_ADDR_H - mmTCP_WATCH0_ADDR_H)
860 WREG32_RLC((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_H) + in kgd_gfx_v9_set_address_watch()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h2134 #define mmTCP_WATCH0_ADDR_H 0x32a0 macro
Dgfx_7_2_d.h2155 #define mmTCP_WATCH0_ADDR_H 0x32a0 macro
Dgfx_8_0_d.h2347 #define mmTCP_WATCH0_ADDR_H 0x32a0 macro
Dgfx_8_1_d.h2326 #define mmTCP_WATCH0_ADDR_H 0x32a0 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2997 #define mmTCP_WATCH0_ADDR_H … macro
Dgc_9_1_offset.h3227 #define mmTCP_WATCH0_ADDR_H … macro
Dgc_9_2_1_offset.h3179 #define mmTCP_WATCH0_ADDR_H … macro
Dgc_10_1_0_offset.h5499 #define mmTCP_WATCH0_ADDR_H … macro
Dgc_10_3_0_offset.h5134 #define mmTCP_WATCH0_ADDR_H … macro