Home
last modified time | relevance | path

Searched refs:mmSPI_GDBG_WAVE_CNTL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2716 #define mmSPI_GDBG_WAVE_CNTL_BASE_IDX … macro
Dgc_9_2_1_offset.h2902 #define mmSPI_GDBG_WAVE_CNTL_BASE_IDX … macro
Dgc_10_1_0_offset.h5198 #define mmSPI_GDBG_WAVE_CNTL_BASE_IDX … macro
Dgc_10_3_0_offset.h4857 #define mmSPI_GDBG_WAVE_CNTL_BASE_IDX … macro