Searched refs:mmSPI_CONFIG_CNTL_1 (Results 1 – 16 of 16) sorted by relevance
| /linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
| D | mxgpu_vi.c | 136 mmSPI_CONFIG_CNTL_1, 0x0000000f, 0x00000009,
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| D | gfx_v10_0.c | 307 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070104),
1408 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070105),
1453 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070104),
3171 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffffffff, 0x00070104),
3218 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffffffff, 0x00070104),
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| D | gfx_v9_0.c | 560 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x0000000f, 0x01000107),
575 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffff010f, 0x01000107),
693 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffff03ff, 0x01000107),
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| D | gfx_v6_0.c | 1729 WREG32(mmSPI_CONFIG_CNTL_1, (4 << SPI_CONFIG_CNTL_1__VTX_DONE_DELAY__SHIFT)); in gfx_v6_0_constants_init()
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| D | gfx_v7_0.c | 1976 WREG32(mmSPI_CONFIG_CNTL_1, (4 << SPI_CONFIG_CNTL_1__VTX_DONE_DELAY__SHIFT)); in gfx_v7_0_constants_init()
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| D | gfx_v8_0.c | 414 mmSPI_CONFIG_CNTL_1, 0x0000000f, 0x00000009,
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| /linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_6_0_d.h | 1195 #define mmSPI_CONFIG_CNTL_1 0x244F macro
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| D | gfx_7_0_d.h | 1478 #define mmSPI_CONFIG_CNTL_1 0x244f macro
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| D | gfx_7_2_d.h | 1499 #define mmSPI_CONFIG_CNTL_1 0x244f macro
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| D | gfx_8_0_d.h | 1691 #define mmSPI_CONFIG_CNTL_1 0x244f macro
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| D | gfx_8_1_d.h | 1659 #define mmSPI_CONFIG_CNTL_1 0x244f macro
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| /linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 5139 #define mmSPI_CONFIG_CNTL_1 … macro
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| D | gc_9_1_offset.h | 5369 #define mmSPI_CONFIG_CNTL_1 … macro
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| D | gc_9_2_1_offset.h | 5327 #define mmSPI_CONFIG_CNTL_1 … macro
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| D | gc_10_1_0_offset.h | 2601 #define mmSPI_CONFIG_CNTL_1 … macro
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| D | gc_10_3_0_offset.h | 2690 #define mmSPI_CONFIG_CNTL_1 … macro
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