1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2018 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8 /************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13 #ifndef ASIC_REG_SIF_RTR_CTRL_0_REGS_H_ 14 #define ASIC_REG_SIF_RTR_CTRL_0_REGS_H_ 15 16 /* 17 ***************************************** 18 * SIF_RTR_CTRL_0 (Prototype: RTR_CTRL) 19 ***************************************** 20 */ 21 22 #define mmSIF_RTR_CTRL_0_PERM_SEL 0x306108 23 24 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_0 0x306114 25 26 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_1 0x306118 27 28 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_2 0x30611C 29 30 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_3 0x306120 31 32 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_4 0x306124 33 34 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_5 0x306128 35 36 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_6 0x30612C 37 38 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_7 0x306130 39 40 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_8 0x306134 41 42 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_9 0x306138 43 44 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_10 0x30613C 45 46 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_11 0x306140 47 48 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_12 0x306144 49 50 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_13 0x306148 51 52 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_14 0x30614C 53 54 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_15 0x306150 55 56 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_16 0x306154 57 58 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_17 0x306158 59 60 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_18 0x30615C 61 62 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_19 0x306160 63 64 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_20 0x306164 65 66 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_21 0x306168 67 68 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_22 0x30616C 69 70 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_23 0x306170 71 72 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_24 0x306174 73 74 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_25 0x306178 75 76 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_26 0x30617C 77 78 #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_27 0x306180 79 80 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_0 0x306184 81 82 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_1 0x306188 83 84 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_2 0x30618C 85 86 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_3 0x306190 87 88 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_4 0x306194 89 90 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_5 0x306198 91 92 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_6 0x30619C 93 94 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_7 0x3061A0 95 96 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_8 0x3061A4 97 98 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_9 0x3061A8 99 100 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_10 0x3061AC 101 102 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_11 0x3061B0 103 104 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_12 0x3061B4 105 106 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_13 0x3061B8 107 108 #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_14 0x3061BC 109 110 #define mmSIF_RTR_CTRL_0_SCRAM_SRAM_EN 0x30626C 111 112 #define mmSIF_RTR_CTRL_0_RL_HBM_EN 0x306274 113 114 #define mmSIF_RTR_CTRL_0_RL_HBM_SAT 0x306278 115 116 #define mmSIF_RTR_CTRL_0_RL_HBM_RST 0x30627C 117 118 #define mmSIF_RTR_CTRL_0_RL_HBM_TIMEOUT 0x306280 119 120 #define mmSIF_RTR_CTRL_0_SCRAM_HBM_EN 0x306284 121 122 #define mmSIF_RTR_CTRL_0_RL_PCI_EN 0x306288 123 124 #define mmSIF_RTR_CTRL_0_RL_PCI_SAT 0x30628C 125 126 #define mmSIF_RTR_CTRL_0_RL_PCI_RST 0x306290 127 128 #define mmSIF_RTR_CTRL_0_RL_PCI_TIMEOUT 0x306294 129 130 #define mmSIF_RTR_CTRL_0_RL_SRAM_EN 0x30629C 131 132 #define mmSIF_RTR_CTRL_0_RL_SRAM_SAT 0x3062A0 133 134 #define mmSIF_RTR_CTRL_0_RL_SRAM_RST 0x3062A4 135 136 #define mmSIF_RTR_CTRL_0_RL_SRAM_TIMEOUT 0x3062AC 137 138 #define mmSIF_RTR_CTRL_0_RL_SRAM_RED 0x3062B4 139 140 #define mmSIF_RTR_CTRL_0_E2E_HBM_EN 0x3062EC 141 142 #define mmSIF_RTR_CTRL_0_E2E_PCI_EN 0x3062F0 143 144 #define mmSIF_RTR_CTRL_0_E2E_HBM_WR_SIZE 0x3062F4 145 146 #define mmSIF_RTR_CTRL_0_E2E_PCI_WR_SIZE 0x3062F8 147 148 #define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_SET_EN 0x306404 149 150 #define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_SET 0x306408 151 152 #define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_WRAP 0x30640C 153 154 #define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_CNT 0x306410 155 156 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM_CTR_SET_EN 0x306414 157 158 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM_CTR_SET 0x306418 159 160 #define mmSIF_RTR_CTRL_0_E2E_HBM_RD_SIZE 0x30641C 161 162 #define mmSIF_RTR_CTRL_0_E2E_PCI_RD_SIZE 0x306420 163 164 #define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_SET_EN 0x306424 165 166 #define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_SET 0x306428 167 168 #define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_WRAP 0x30642C 169 170 #define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_CNT 0x306430 171 172 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM_CTR_SET_EN 0x306434 173 174 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM_CTR_SET 0x306438 175 176 #define mmSIF_RTR_CTRL_0_NL_HBM_SEL_0 0x306450 177 178 #define mmSIF_RTR_CTRL_0_NL_HBM_SEL_1 0x306454 179 180 #define mmSIF_RTR_CTRL_0_NON_LIN_EN 0x306480 181 182 #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_0 0x306500 183 184 #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_1 0x306504 185 186 #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_2 0x306508 187 188 #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_3 0x30650C 189 190 #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_4 0x306510 191 192 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_0 0x306514 193 194 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_1 0x306520 195 196 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_2 0x306524 197 198 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_3 0x306528 199 200 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_4 0x30652C 201 202 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_5 0x306530 203 204 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_6 0x306534 205 206 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_7 0x306538 207 208 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_8 0x30653C 209 210 #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_9 0x306540 211 212 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_0 0x306550 213 214 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_1 0x306554 215 216 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_2 0x306558 217 218 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_3 0x30655C 219 220 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_4 0x306560 221 222 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_5 0x306564 223 224 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_6 0x306568 225 226 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_7 0x30656C 227 228 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_8 0x306570 229 230 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_9 0x306574 231 232 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_10 0x306578 233 234 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_11 0x30657C 235 236 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_12 0x306580 237 238 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_13 0x306584 239 240 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_14 0x306588 241 242 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_15 0x30658C 243 244 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_16 0x306590 245 246 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_17 0x306594 247 248 #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_18 0x306598 249 250 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_0 0x3065E4 251 252 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_1 0x3065E8 253 254 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_2 0x3065EC 255 256 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_3 0x3065F0 257 258 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_4 0x3065F4 259 260 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_5 0x3065F8 261 262 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_6 0x3065FC 263 264 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_7 0x306600 265 266 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_8 0x306604 267 268 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_9 0x306608 269 270 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_10 0x30660C 271 272 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_11 0x306610 273 274 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_12 0x306614 275 276 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_13 0x306618 277 278 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_14 0x30661C 279 280 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_15 0x306620 281 282 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_0 0x306624 283 284 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_1 0x306628 285 286 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_2 0x30662C 287 288 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_3 0x306630 289 290 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_4 0x306634 291 292 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_5 0x306638 293 294 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_6 0x30663C 295 296 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_7 0x306640 297 298 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_8 0x306644 299 300 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_9 0x306648 301 302 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_10 0x30664C 303 304 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_11 0x306650 305 306 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_12 0x306654 307 308 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_13 0x306658 309 310 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_14 0x30665C 311 312 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_15 0x306660 313 314 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_0 0x306664 315 316 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_1 0x306668 317 318 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_2 0x30666C 319 320 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_3 0x306670 321 322 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_4 0x306674 323 324 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_5 0x306678 325 326 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_6 0x30667C 327 328 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_7 0x306680 329 330 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_8 0x306684 331 332 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_9 0x306688 333 334 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_10 0x30668C 335 336 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_11 0x306690 337 338 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_12 0x306694 339 340 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_13 0x306698 341 342 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_14 0x30669C 343 344 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_15 0x3066A0 345 346 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_0 0x3066A4 347 348 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_1 0x3066A8 349 350 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_2 0x3066AC 351 352 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_3 0x3066B0 353 354 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_4 0x3066B4 355 356 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_5 0x3066B8 357 358 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_6 0x3066BC 359 360 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_7 0x3066C0 361 362 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_8 0x3066C4 363 364 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_9 0x3066C8 365 366 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_10 0x3066CC 367 368 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_11 0x3066D0 369 370 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_12 0x3066D4 371 372 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_13 0x3066D8 373 374 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_14 0x3066DC 375 376 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_15 0x3066E0 377 378 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_0 0x3066E4 379 380 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_1 0x3066E8 381 382 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_2 0x3066EC 383 384 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_3 0x3066F0 385 386 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_4 0x3066F4 387 388 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_5 0x3066F8 389 390 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_6 0x3066FC 391 392 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_7 0x306700 393 394 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_8 0x306704 395 396 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_9 0x306708 397 398 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_10 0x30670C 399 400 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_11 0x306710 401 402 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_12 0x306714 403 404 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_13 0x306718 405 406 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_14 0x30671C 407 408 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_15 0x306720 409 410 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_0 0x306724 411 412 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_1 0x306728 413 414 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_2 0x30672C 415 416 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_3 0x306730 417 418 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_4 0x306734 419 420 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_5 0x306738 421 422 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_6 0x30673C 423 424 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_7 0x306740 425 426 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_8 0x306744 427 428 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_9 0x306748 429 430 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_10 0x30674C 431 432 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_11 0x306750 433 434 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_12 0x306754 435 436 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_13 0x306758 437 438 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_14 0x30675C 439 440 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_15 0x306760 441 442 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_0 0x306764 443 444 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_1 0x306768 445 446 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_2 0x30676C 447 448 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_3 0x306770 449 450 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_4 0x306774 451 452 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_5 0x306778 453 454 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_6 0x30677C 455 456 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_7 0x306780 457 458 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_8 0x306784 459 460 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_9 0x306788 461 462 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_10 0x30678C 463 464 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_11 0x306790 465 466 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_12 0x306794 467 468 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_13 0x306798 469 470 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_14 0x30679C 471 472 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_15 0x3067A0 473 474 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_0 0x3067A4 475 476 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_1 0x3067A8 477 478 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_2 0x3067AC 479 480 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_3 0x3067B0 481 482 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_4 0x3067B4 483 484 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_5 0x3067B8 485 486 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_6 0x3067BC 487 488 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_7 0x3067C0 489 490 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_8 0x3067C4 491 492 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_9 0x3067C8 493 494 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_10 0x3067CC 495 496 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_11 0x3067D0 497 498 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_12 0x3067D4 499 500 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_13 0x3067D8 501 502 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_14 0x3067DC 503 504 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_15 0x3067E0 505 506 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_0 0x306824 507 508 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_1 0x306828 509 510 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_2 0x30682C 511 512 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_3 0x306830 513 514 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_4 0x306834 515 516 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_5 0x306838 517 518 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_6 0x30683C 519 520 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_7 0x306840 521 522 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_8 0x306844 523 524 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_9 0x306848 525 526 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_10 0x30684C 527 528 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_11 0x306850 529 530 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_12 0x306854 531 532 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_13 0x306858 533 534 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_14 0x30685C 535 536 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_15 0x306860 537 538 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_0 0x306864 539 540 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_1 0x306868 541 542 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_2 0x30686C 543 544 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_3 0x306870 545 546 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_4 0x306874 547 548 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_5 0x306878 549 550 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_6 0x30687C 551 552 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_7 0x306880 553 554 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_8 0x306884 555 556 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_9 0x306888 557 558 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_10 0x30688C 559 560 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_11 0x306890 561 562 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_12 0x306894 563 564 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_13 0x306898 565 566 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_14 0x30689C 567 568 #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_15 0x3068A0 569 570 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_0 0x3068A4 571 572 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_1 0x3068A8 573 574 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_2 0x3068AC 575 576 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_3 0x3068B0 577 578 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_4 0x3068B4 579 580 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_5 0x3068B8 581 582 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_6 0x3068BC 583 584 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_7 0x3068C0 585 586 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_8 0x3068C4 587 588 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_9 0x3068C8 589 590 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_10 0x3068CC 591 592 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_11 0x3068D0 593 594 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_12 0x3068D4 595 596 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_13 0x3068D8 597 598 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_14 0x3068DC 599 600 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_15 0x3068E0 601 602 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_0 0x3068E4 603 604 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_1 0x3068E8 605 606 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_2 0x3068EC 607 608 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_3 0x3068F0 609 610 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_4 0x3068F4 611 612 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_5 0x3068F8 613 614 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_6 0x3068FC 615 616 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_7 0x306900 617 618 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_8 0x306904 619 620 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_9 0x306908 621 622 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_10 0x30690C 623 624 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_11 0x306910 625 626 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_12 0x306914 627 628 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_13 0x306918 629 630 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_14 0x30691C 631 632 #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_15 0x306920 633 634 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_0 0x306924 635 636 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_1 0x306928 637 638 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_2 0x30692C 639 640 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_3 0x306930 641 642 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_4 0x306934 643 644 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_5 0x306938 645 646 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_6 0x30693C 647 648 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_7 0x306940 649 650 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_8 0x306944 651 652 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_9 0x306948 653 654 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_10 0x30694C 655 656 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_11 0x306950 657 658 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_12 0x306954 659 660 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_13 0x306958 661 662 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_14 0x30695C 663 664 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_15 0x306960 665 666 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_0 0x306964 667 668 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_1 0x306968 669 670 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_2 0x30696C 671 672 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_3 0x306970 673 674 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_4 0x306974 675 676 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_5 0x306978 677 678 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_6 0x30697C 679 680 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_7 0x306980 681 682 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_8 0x306984 683 684 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_9 0x306988 685 686 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_10 0x30698C 687 688 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_11 0x306990 689 690 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_12 0x306994 691 692 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_13 0x306998 693 694 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_14 0x30699C 695 696 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_15 0x3069A0 697 698 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_0 0x3069A4 699 700 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_1 0x3069A8 701 702 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_2 0x3069AC 703 704 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_3 0x3069B0 705 706 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_4 0x3069B4 707 708 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_5 0x3069B8 709 710 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_6 0x3069BC 711 712 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_7 0x3069C0 713 714 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_8 0x3069C4 715 716 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_9 0x3069C8 717 718 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_10 0x3069CC 719 720 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_11 0x3069D0 721 722 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_12 0x3069D4 723 724 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_13 0x3069D8 725 726 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_14 0x3069DC 727 728 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_15 0x3069E0 729 730 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_0 0x3069E4 731 732 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_1 0x3069E8 733 734 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_2 0x3069EC 735 736 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_3 0x3069F0 737 738 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_4 0x3069F4 739 740 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_5 0x3069F8 741 742 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_6 0x3069FC 743 744 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_7 0x306A00 745 746 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_8 0x306A04 747 748 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_9 0x306A08 749 750 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_10 0x306A0C 751 752 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_11 0x306A10 753 754 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_12 0x306A14 755 756 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_13 0x306A18 757 758 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_14 0x306A1C 759 760 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_15 0x306A20 761 762 #define mmSIF_RTR_CTRL_0_RANGE_SEC_HIT_AW 0x306A64 763 764 #define mmSIF_RTR_CTRL_0_RANGE_SEC_HIT_AR 0x306A68 765 766 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_HIT_AW 0x306A6C 767 768 #define mmSIF_RTR_CTRL_0_RANGE_PRIV_HIT_AR 0x306A70 769 770 #define mmSIF_RTR_CTRL_0_RGL_CFG 0x306B64 771 772 #define mmSIF_RTR_CTRL_0_RGL_SHIFT 0x306B68 773 774 #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_0 0x306B6C 775 776 #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_1 0x306B70 777 778 #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_2 0x306B74 779 780 #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_3 0x306B78 781 782 #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_4 0x306B7C 783 784 #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_5 0x306B80 785 786 #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_6 0x306B84 787 788 #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_7 0x306B88 789 790 #define mmSIF_RTR_CTRL_0_RGL_TOKEN_0 0x306BAC 791 792 #define mmSIF_RTR_CTRL_0_RGL_TOKEN_1 0x306BB0 793 794 #define mmSIF_RTR_CTRL_0_RGL_TOKEN_2 0x306BB4 795 796 #define mmSIF_RTR_CTRL_0_RGL_TOKEN_3 0x306BB8 797 798 #define mmSIF_RTR_CTRL_0_RGL_TOKEN_4 0x306BBC 799 800 #define mmSIF_RTR_CTRL_0_RGL_TOKEN_5 0x306BC0 801 802 #define mmSIF_RTR_CTRL_0_RGL_TOKEN_6 0x306BC4 803 804 #define mmSIF_RTR_CTRL_0_RGL_TOKEN_7 0x306BC8 805 806 #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_0 0x306BEC 807 808 #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_1 0x306BF0 809 810 #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_2 0x306BF4 811 812 #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_3 0x306BF8 813 814 #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_4 0x306BFC 815 816 #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_5 0x306C00 817 818 #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_6 0x306C04 819 820 #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_7 0x306C08 821 822 #define mmSIF_RTR_CTRL_0_RGL_WDT 0x306C2C 823 824 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH0_CTR_WRAP 0x306C30 825 826 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH1_CTR_WRAP 0x306C34 827 828 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH0_CTR_WRAP 0x306C38 829 830 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH1_CTR_WRAP 0x306C3C 831 832 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH0_CTR_WRAP 0x306C40 833 834 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH1_CTR_WRAP 0x306C44 835 836 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH0_CTR_WRAP 0x306C48 837 838 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH1_CTR_WRAP 0x306C4C 839 840 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH0_CTR_CNT 0x306C50 841 842 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH1_CTR_CNT 0x306C54 843 844 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH0_CTR_CNT 0x306C58 845 846 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH1_CTR_CNT 0x306C5C 847 848 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH0_CTR_CNT 0x306C60 849 850 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH1_CTR_CNT 0x306C64 851 852 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH0_CTR_CNT 0x306C68 853 854 #define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH1_CTR_CNT 0x306C6C 855 856 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH0_CTR_WRAP 0x306C70 857 858 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH1_CTR_WRAP 0x306C74 859 860 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH0_CTR_WRAP 0x306C78 861 862 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH1_CTR_WRAP 0x306C7C 863 864 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH0_CTR_WRAP 0x306C80 865 866 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH1_CTR_WRAP 0x306C84 867 868 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH0_CTR_WRAP 0x306C88 869 870 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH1_CTR_WRAP 0x306C8C 871 872 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH0_CTR_CNT 0x306C90 873 874 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH1_CTR_CNT 0x306C94 875 876 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH0_CTR_CNT 0x306C98 877 878 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH1_CTR_CNT 0x306C9C 879 880 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH0_CTR_CNT 0x306CA0 881 882 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH1_CTR_CNT 0x306CA4 883 884 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH0_CTR_CNT 0x306CA8 885 886 #define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH1_CTR_CNT 0x306CAC 887 888 #define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_0 0x306CB0 889 890 #define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_1 0x306CB4 891 892 #define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_2 0x306CB8 893 894 #define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_3 0x306CBC 895 896 #endif /* ASIC_REG_SIF_RTR_CTRL_0_REGS_H_ */ 897