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Searched refs:mmSDMA0_EDC_CONFIG (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h112 #define mmSDMA0_EDC_CONFIG … macro
Dsdma0_4_0_offset.h114 #define mmSDMA0_EDC_CONFIG 0x0032 macro
Dsdma0_4_2_2_offset.h114 #define mmSDMA0_EDC_CONFIG … macro
Dsdma0_4_2_offset.h114 #define mmSDMA0_EDC_CONFIG … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h182 #define mmSDMA0_EDC_CONFIG 0x341a macro
Doss_3_0_1_d.h180 #define mmSDMA0_EDC_CONFIG 0x341a macro
Doss_2_0_d.h245 #define mmSDMA0_EDC_CONFIG 0x341a macro
Doss_3_0_d.h317 #define mmSDMA0_EDC_CONFIG 0x341a macro
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dsdma_v4_0.c2103 sdma_edc_config = RREG32_SDMA(type, mmSDMA0_EDC_CONFIG); in sdma_v4_0_set_ecc_irq_state()
2106 WREG32_SDMA(type, mmSDMA0_EDC_CONFIG, sdma_edc_config); in sdma_v4_0_set_ecc_irq_state()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h89 #define mmSDMA0_EDC_CONFIG … macro
Dgc_10_3_0_offset.h88 #define mmSDMA0_EDC_CONFIG … macro