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Searched refs:mmRLC_SPARE_INT (Results 1 – 6 of 6) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6265 #define mmRLC_SPARE_INT … macro
Dgc_9_1_offset.h6487 #define mmRLC_SPARE_INT … macro
Dgc_9_2_1_offset.h6463 #define mmRLC_SPARE_INT … macro
Dgc_10_1_0_offset.h9591 #define mmRLC_SPARE_INT … macro
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c1644 reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, 0, mmRLC_SPARE_INT); in gfx_v9_0_init_rlcg_reg_access_ctrl()
Dgfx_v10_0.c4149 SOC15_REG_OFFSET(GC, 0, mmRLC_SPARE_INT); in gfx_v10_0_init_rlcg_reg_access_ctrl()