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Searched refs:mmRLC_CLK_CNTL (Results 1 – 7 of 7) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_1_d.h1356 #define mmRLC_CLK_CNTL 0xec0b macro
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c7731 def = data = RREG32_SOC15(GC, 0, mmRLC_CLK_CNTL); in gfx_v10_0_update_fine_grain_clock_gating()
7736 WREG32_SOC15(GC, 0, mmRLC_CLK_CNTL, data); in gfx_v10_0_update_fine_grain_clock_gating()
7745 def = data = RREG32_SOC15(GC, 0, mmRLC_CLK_CNTL); in gfx_v10_0_update_fine_grain_clock_gating()
7750 WREG32_SOC15(GC, 0, mmRLC_CLK_CNTL, data); in gfx_v10_0_update_fine_grain_clock_gating()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6801 #define mmRLC_CLK_CNTL macro
Dgc_9_1_offset.h7027 #define mmRLC_CLK_CNTL macro
Dgc_9_2_1_offset.h7063 #define mmRLC_CLK_CNTL macro
Dgc_10_1_0_offset.h10373 #define mmRLC_CLK_CNTL macro
Dgc_10_3_0_offset.h10111 #define mmRLC_CLK_CNTL macro