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Searched refs:mmPHYPLLD_PIXCLK_RESYNC_CNTL (Results 1 – 8 of 8) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_2_d.h1072 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL 0x103 macro
Ddce_12_0_offset.h656 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h206 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL … macro
Ddcn_2_1_0_offset.h158 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL … macro
Ddcn_1_0_offset.h470 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL … macro
Ddcn_3_0_2_offset.h138 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL … macro
Ddcn_2_0_0_offset.h138 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL … macro
Ddcn_3_0_0_offset.h120 #define mmPHYPLLD_PIXCLK_RESYNC_CNTL … macro