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Searched refs:mmMC_SEQ_RAS_TIMING (Results 1 – 7 of 7) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h926 #define mmMC_SEQ_RAS_TIMING 0x0A28 macro
Dgmc_7_1_d.h636 #define mmMC_SEQ_RAS_TIMING 0xa28 macro
Dgmc_8_1_d.h740 #define mmMC_SEQ_RAS_TIMING 0xa28 macro
/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c2379 case mmMC_SEQ_RAS_TIMING: in iceland_check_s0_mc_reg_index()
2616 …ster(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); in iceland_initialize_mc_reg_table()
Dci_smumgr.c2452 case mmMC_SEQ_RAS_TIMING: in ci_check_s0_mc_reg_index()
2689 …ster(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); in ci_initialize_mc_reg_table()
Dtonga_smumgr.c2842 case mmMC_SEQ_RAS_TIMING: in tonga_check_s0_mc_reg_index()
3082 cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); in tonga_initialize_mc_reg_table()
Dfiji_smumgr.c2524 cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); in fiji_initialize_mc_reg_table()