Home
last modified time | relevance | path

Searched refs:mmHDMI_ACR_48_1 (Results 1 – 9 of 9) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c1442 tmp = RREG32(mmHDMI_ACR_48_1 + dig->afmt->offset); in dce_v6_0_audio_set_acr()
1444 WREG32(mmHDMI_ACR_48_1 + dig->afmt->offset, tmp); in dce_v6_0_audio_set_acr()
Ddce_v10_0.c1505 tmp = RREG32(mmHDMI_ACR_48_1 + dig->afmt->offset); in dce_v10_0_afmt_update_ACR()
1507 WREG32(mmHDMI_ACR_48_1 + dig->afmt->offset, tmp); in dce_v10_0_afmt_update_ACR()
Ddce_v11_0.c1554 tmp = RREG32(mmHDMI_ACR_48_1 + dig->afmt->offset); in dce_v11_0_afmt_update_ACR()
1556 WREG32(mmHDMI_ACR_48_1 + dig->afmt->offset, tmp); in dce_v11_0_afmt_update_ACR()
Ddce_v8_0.c1462 WREG32(mmHDMI_ACR_48_1 + offset, acr.n_48khz); in dce_v8_0_afmt_update_ACR()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3855 #define mmHDMI_ACR_48_1 0x1C3C macro
Ddce_8_0_d.h3223 #define mmHDMI_ACR_48_1 0x1c3c macro
Ddce_10_0_d.h4002 #define mmHDMI_ACR_48_1 0x4a33 macro
Ddce_11_0_d.h3877 #define mmHDMI_ACR_48_1 0x4a33 macro
Ddce_11_2_d.h5108 #define mmHDMI_ACR_48_1 0x4a33 macro