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Searched refs:mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_d.h4373 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 0x1643 macro
Ddce_11_0_d.h4328 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 0x1643 macro
Ddce_11_2_d.h5560 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 0x1643 macro
Ddce_12_0_offset.h1354 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h415 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro
Ddcn_3_0_1_offset.h610 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro
Ddcn_2_1_0_offset.h670 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro
Ddcn_1_0_offset.h1040 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro
Ddcn_3_0_2_offset.h582 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro
Ddcn_2_0_0_offset.h708 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro
Ddcn_3_0_0_offset.h594 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro