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Searched refs:mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_d.h3743 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 0x1754 macro
Ddce_10_0_d.h4369 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 0x1674 macro
Ddce_11_0_d.h4324 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 0x1674 macro
Ddce_11_2_d.h5556 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 0x1674 macro
Ddce_12_0_offset.h1448 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h407 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 … macro
Ddcn_3_0_1_offset.h602 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 … macro
Ddcn_2_1_0_offset.h662 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 … macro
Ddcn_1_0_offset.h1032 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 … macro
Ddcn_3_0_2_offset.h574 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 … macro
Ddcn_2_0_0_offset.h700 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 … macro
Ddcn_3_0_0_offset.h586 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1 … macro