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Searched refs:mmDISPCLK_CGTT_BLK_CTRL_REG (Results 1 – 14 of 14) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3001 #define mmDISPCLK_CGTT_BLK_CTRL_REG 0x0135 macro
Ddce_8_0_d.h1024 #define mmDISPCLK_CGTT_BLK_CTRL_REG 0x135 macro
Ddce_10_0_d.h1181 #define mmDISPCLK_CGTT_BLK_CTRL_REG 0x135 macro
Ddce_11_0_d.h991 #define mmDISPCLK_CGTT_BLK_CTRL_REG 0x135 macro
Ddce_11_2_d.h1062 #define mmDISPCLK_CGTT_BLK_CTRL_REG 0x135 macro
Ddce_12_0_offset.h750 #define mmDISPCLK_CGTT_BLK_CTRL_REG … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h74 #define mmDISPCLK_CGTT_BLK_CTRL_REG … macro
Ddcn_3_0_3_offset.h165 #define mmDISPCLK_CGTT_BLK_CTRL_REG … macro
Ddcn_3_0_1_offset.h254 #define mmDISPCLK_CGTT_BLK_CTRL_REG … macro
Ddcn_2_1_0_offset.h208 #define mmDISPCLK_CGTT_BLK_CTRL_REG … macro
Ddcn_1_0_offset.h550 #define mmDISPCLK_CGTT_BLK_CTRL_REG … macro
Ddcn_3_0_2_offset.h192 #define mmDISPCLK_CGTT_BLK_CTRL_REG … macro
Ddcn_2_0_0_offset.h194 #define mmDISPCLK_CGTT_BLK_CTRL_REG … macro
Ddcn_3_0_0_offset.h176 #define mmDISPCLK_CGTT_BLK_CTRL_REG … macro