Home
last modified time | relevance | path

Searched refs:mmDIG1_TMDS_CTL0_1_GEN_CNTL (Results 1 – 13 of 13) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2640 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL 0x1F86 macro
Ddce_8_0_d.h3473 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL 0x1f86 macro
Ddce_10_0_d.h4252 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL 0x4b75 macro
Ddce_11_0_d.h4199 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL 0x4b75 macro
Ddce_11_2_d.h5430 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL 0x4b75 macro
Ddce_12_0_offset.h10466 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5766 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL … macro
Ddcn_3_0_3_offset.h5278 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL … macro
Ddcn_2_1_0_offset.h10161 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL … macro
Ddcn_1_0_offset.h8643 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL … macro
Ddcn_3_0_2_offset.h9860 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL … macro
Ddcn_2_0_0_offset.h11254 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL … macro
Ddcn_3_0_0_offset.h10996 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL … macro