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Searched refs:mmDC_I2C_DDC1_SETUP (Results 1 – 14 of 14) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1315 #define mmDC_I2C_DDC1_SETUP 0x1824 macro
Ddce_8_0_d.h3553 #define mmDC_I2C_DDC1_SETUP 0x1824 macro
Ddce_10_0_d.h7167 #define mmDC_I2C_DDC1_SETUP 0x16df macro
Ddce_11_0_d.h7357 #define mmDC_I2C_DDC1_SETUP 0x16df macro
Ddce_11_2_d.h8749 #define mmDC_I2C_DDC1_SETUP 0x16df macro
Ddce_12_0_offset.h1658 #define mmDC_I2C_DDC1_SETUP … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5125 #define mmDC_I2C_DDC1_SETUP … macro
Ddcn_3_0_3_offset.h4565 #define mmDC_I2C_DDC1_SETUP … macro
Ddcn_3_0_1_offset.h7418 #define mmDC_I2C_DDC1_SETUP … macro
Ddcn_2_1_0_offset.h9281 #define mmDC_I2C_DDC1_SETUP … macro
Ddcn_1_0_offset.h7689 #define mmDC_I2C_DDC1_SETUP … macro
Ddcn_3_0_2_offset.h8967 #define mmDC_I2C_DDC1_SETUP … macro
Ddcn_2_0_0_offset.h10314 #define mmDC_I2C_DDC1_SETUP … macro
Ddcn_3_0_0_offset.h10043 #define mmDC_I2C_DDC1_SETUP … macro