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Searched refs:mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_0 (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/drivers/accel/habanalabs/include/gaudi2/asic_reg/
Ddcore0_sync_mngr_glbl_regs.h947 #define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_0 0x411E750 macro
/linux-6.6.21/drivers/accel/habanalabs/gaudi2/
Dgaudi2.c5239 WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_0, GAUDI2_IRQ_NUM_COMPLETION); in gaudi2_init_sm()
10133 cq_lbw_data_addr = mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_0 + offset; in gaudi2_restore_user_sm_registers()
10150 cq_lbw_data_addr = mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_0 + DCORE_OFFSET; in gaudi2_restore_user_sm_registers()