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Searched refs:mmDCORE0_HMMU0_MMU_INTERRUPT_CLR (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/drivers/accel/habanalabs/include/gaudi2/asic_reg/
Ddcore0_hmmu0_mmu_regs.h53 #define mmDCORE0_HMMU0_MMU_INTERRUPT_CLR 0x4080048 macro
Dgaudi2_regs.h297 #define MMU_INTERRUPT_CLR_OFFSET MMU_OFFSET(mmDCORE0_HMMU0_MMU_INTERRUPT_CLR)