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Searched refs:mmCRTC0_CRTC_GSL_CONTROL (Results 1 – 10 of 10) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_hw_sequencer.c56 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),
59 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),
62 .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),
65 .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),
68 .crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),
71 .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_hw_sequencer.c45 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_hw_sequencer.c44 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h509 #define mmCRTC0_CRTC_GSL_CONTROL 0x1B7B macro
Ddce_8_0_d.h852 #define mmCRTC0_CRTC_GSL_CONTROL 0x1b7b macro
Ddce_10_0_d.h981 #define mmCRTC0_CRTC_GSL_CONTROL 0x1b7b macro
Ddce_11_0_d.h792 #define mmCRTC0_CRTC_GSL_CONTROL 0x1b7b macro
Ddce_11_2_d.h841 #define mmCRTC0_CRTC_GSL_CONTROL 0x1b7b macro
Ddce_12_0_offset.h4260 #define mmCRTC0_CRTC_GSL_CONTROL macro
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_hw_sequencer.c100 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),