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Searched refs:mmCP_MEC_ME1_UCODE_ADDR (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gca/ !
Dgfx_7_0_d.h250 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c macro
Dgfx_7_2_d.h252 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c macro
Dgfx_8_0_d.h281 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a macro
Dgfx_8_1_d.h282 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a macro
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ !
Dgfx_v7_0.c2669 WREG32(mmCP_MEC_ME1_UCODE_ADDR, 0); in gfx_v7_0_cp_compute_load_microcode()
2672 WREG32(mmCP_MEC_ME1_UCODE_ADDR, 0); in gfx_v7_0_cp_compute_load_microcode()
Dgfx_v9_0.c3203 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, in gfx_v9_0_cp_compute_load_microcode()
3209 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, in gfx_v9_0_cp_compute_load_microcode()
Dgfx_v10_0.c6282 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, 0); in gfx_v10_0_cp_compute_load_microcode()
6288 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version); in gfx_v10_0_cp_compute_load_microcode()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ !
Dgc_9_0_offset.h6743 #define mmCP_MEC_ME1_UCODE_ADDR macro
Dgc_9_1_offset.h6967 #define mmCP_MEC_ME1_UCODE_ADDR macro
Dgc_9_2_1_offset.h6995 #define mmCP_MEC_ME1_UCODE_ADDR macro
Dgc_10_1_0_offset.h10245 #define mmCP_MEC_ME1_UCODE_ADDR macro
Dgc_10_3_0_offset.h9961 #define mmCP_MEC_ME1_UCODE_ADDR macro