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Searched refs:mmCP_INT_CNTL_RING2 (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c3233 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING2); in gfx_v6_0_set_compute_eop_interrupt_state()
3235 WREG32(mmCP_INT_CNTL_RING2, cp_int_cntl); in gfx_v6_0_set_compute_eop_interrupt_state()
3246 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING2); in gfx_v6_0_set_compute_eop_interrupt_state()
3248 WREG32(mmCP_INT_CNTL_RING2, cp_int_cntl); in gfx_v6_0_set_compute_eop_interrupt_state()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h440 #define mmCP_INT_CNTL_RING2 0x306C macro
Dgfx_7_0_d.h224 #define mmCP_INT_CNTL_RING2 0x306c macro
Dgfx_7_2_d.h224 #define mmCP_INT_CNTL_RING2 0x306c macro
Dgfx_8_0_d.h248 #define mmCP_INT_CNTL_RING2 0x306c macro
Dgfx_8_1_d.h249 #define mmCP_INT_CNTL_RING2 0x306c macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2472 #define mmCP_INT_CNTL_RING2 … macro
Dgc_9_1_offset.h2749 #define mmCP_INT_CNTL_RING2 … macro
Dgc_9_2_1_offset.h2687 #define mmCP_INT_CNTL_RING2 … macro
Dgc_10_1_0_offset.h4811 #define mmCP_INT_CNTL_RING2 … macro
Dgc_10_3_0_offset.h4464 #define mmCP_INT_CNTL_RING2 … macro