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Searched refs:mmCP_HQD_EOP_BASE_ADDR (Results 1 – 9 of 9) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_d.h670 #define mmCP_HQD_EOP_BASE_ADDR 0x326a macro
Dgfx_8_1_d.h670 #define mmCP_HQD_EOP_BASE_ADDR 0x326a macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2897 #define mmCP_HQD_EOP_BASE_ADDR … macro
Dgc_9_1_offset.h3125 #define mmCP_HQD_EOP_BASE_ADDR … macro
Dgc_9_2_1_offset.h3081 #define mmCP_HQD_EOP_BASE_ADDR … macro
Dgc_10_1_0_offset.h5379 #define mmCP_HQD_EOP_BASE_ADDR … macro
Dgc_10_3_0_offset.h5014 #define mmCP_HQD_EOP_BASE_ADDR … macro
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c3385 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR, in gfx_v9_0_kiq_init_register()
Dgfx_v10_0.c6649 WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR, in gfx_v10_0_kiq_init_register()