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Searched refs:min_core_set_clock_in_sr (Results 1 – 12 of 12) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/
Ddm_pp_interface.h87 uint32_t min_core_set_clock_in_sr; member
/linux-6.6.21/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c67 adev->pm.pm_display_cfg.min_core_set_clock_in_sr = in dm_pp_apply_display_requirements()
/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvegam_smumgr.c839 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in vegam_populate_single_graphic_level()
843 hwmgr->display_config->min_core_set_clock_in_sr); in vegam_populate_single_graphic_level()
Dfiji_smumgr.c974 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in fiji_populate_single_graphic_level()
978 hwmgr->display_config->min_core_set_clock_in_sr); in fiji_populate_single_graphic_level()
Dpolaris10_smumgr.c993 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in polaris10_populate_single_graphic_level()
997 hwmgr->display_config->min_core_set_clock_in_sr); in polaris10_populate_single_graphic_level()
Diceland_smumgr.c932 hwmgr->display_config->min_core_set_clock_in_sr; in iceland_populate_single_graphic_level()
Dtonga_smumgr.c659 hwmgr->display_config->min_core_set_clock_in_sr; in tonga_populate_single_graphic_level()
/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu8_hwmgr.c760 uint32_t clks = hwmgr->display_config->min_core_set_clock_in_sr; in smu8_set_deep_sleep_sclk_threshold()
Dsmu7_hwmgr.c4692 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr && in smu7_check_smc_update_required_for_display_configuration()
4694 hwmgr->display_config->min_core_set_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK)) in smu7_check_smc_update_required_for_display_configuration()
Dvega12_hwmgr.c2622 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr) in vega12_check_smc_update_required_for_display_configuration()
Dvega20_hwmgr.c3917 hwmgr->display_config->min_core_set_clock_in_sr)) in vega20_check_smc_update_required_for_display_configuration()
Dvega10_hwmgr.c5038 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr) in vega10_check_smc_update_required_for_display_configuration()