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Searched refs:mbox (Results 1 – 25 of 409) sorted by relevance

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/linux-6.6.21/drivers/net/ethernet/cavium/liquidio/
Docteon_mailbox.c36 int octeon_mbox_read(struct octeon_mbox *mbox) in octeon_mbox_read() argument
41 spin_lock(&mbox->lock); in octeon_mbox_read()
43 msg.u64 = readq(mbox->mbox_read_reg); in octeon_mbox_read()
46 spin_unlock(&mbox->lock); in octeon_mbox_read()
50 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) { in octeon_mbox_read()
51 mbox->mbox_req.data[mbox->mbox_req.recv_len - 1] = msg.u64; in octeon_mbox_read()
52 mbox->mbox_req.recv_len++; in octeon_mbox_read()
54 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) { in octeon_mbox_read()
55 mbox->mbox_resp.data[mbox->mbox_resp.recv_len - 1] = in octeon_mbox_read()
57 mbox->mbox_resp.recv_len++; in octeon_mbox_read()
[all …]
/linux-6.6.21/drivers/mailbox/
Dmailbox-altera.c60 static inline int altera_mbox_full(struct altera_mbox *mbox) in altera_mbox_full() argument
64 status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG); in altera_mbox_full()
68 static inline int altera_mbox_pending(struct altera_mbox *mbox) in altera_mbox_pending() argument
72 status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG); in altera_mbox_pending()
76 static void altera_mbox_rx_intmask(struct altera_mbox *mbox, bool enable) in altera_mbox_rx_intmask() argument
80 mask = readl_relaxed(mbox->mbox_base + MAILBOX_INTMASK_REG); in altera_mbox_rx_intmask()
85 writel_relaxed(mask, mbox->mbox_base + MAILBOX_INTMASK_REG); in altera_mbox_rx_intmask()
88 static void altera_mbox_tx_intmask(struct altera_mbox *mbox, bool enable) in altera_mbox_tx_intmask() argument
92 mask = readl_relaxed(mbox->mbox_base + MAILBOX_INTMASK_REG); in altera_mbox_tx_intmask()
97 writel_relaxed(mask, mbox->mbox_base + MAILBOX_INTMASK_REG); in altera_mbox_tx_intmask()
[all …]
Dhi6220-mailbox.c90 static void mbox_set_state(struct hi6220_mbox *mbox, in mbox_set_state() argument
95 status = readl(mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
97 writel(status, mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
100 static void mbox_set_mode(struct hi6220_mbox *mbox, in mbox_set_mode() argument
105 mode = readl(mbox->base + MBOX_MODE_REG(slot)); in mbox_set_mode()
107 writel(mode, mbox->base + MBOX_MODE_REG(slot)); in mbox_set_mode()
113 struct hi6220_mbox *mbox = mchan->parent; in hi6220_mbox_last_tx_done() local
117 BUG_ON(mbox->tx_irq_mode); in hi6220_mbox_last_tx_done()
119 state = readl(mbox->base + MBOX_MODE_REG(mchan->slot)); in hi6220_mbox_last_tx_done()
126 struct hi6220_mbox *mbox = mchan->parent; in hi6220_mbox_send_data() local
[all …]
Dmailbox-mpfs.c74 static bool mpfs_mbox_busy(struct mpfs_mbox *mbox) in mpfs_mbox_busy() argument
78 status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET); in mpfs_mbox_busy()
85 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; in mpfs_mbox_last_tx_done() local
86 struct mpfs_mss_response *response = mbox->response; in mpfs_mbox_last_tx_done()
89 if (mpfs_mbox_busy(mbox)) in mpfs_mbox_last_tx_done()
98 val = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET); in mpfs_mbox_last_tx_done()
106 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; in mpfs_mbox_send_data() local
112 mbox->response = msg->response; in mpfs_mbox_send_data()
113 mbox->resp_offset = msg->resp_offset; in mpfs_mbox_send_data()
115 if (mpfs_mbox_busy(mbox)) in mpfs_mbox_send_data()
[all …]
Dsun6i-msgbox.c44 #define mbox_dbg(mbox, ...) dev_dbg((mbox)->controller.dev, __VA_ARGS__) argument
58 return chan - chan->mbox->chans; in channel_number()
68 struct sun6i_msgbox *mbox = dev_id; in sun6i_msgbox_irq() local
73 status = readl(mbox->regs + LOCAL_IRQ_EN_REG) & in sun6i_msgbox_irq()
74 readl(mbox->regs + LOCAL_IRQ_STAT_REG); in sun6i_msgbox_irq()
80 struct mbox_chan *chan = &mbox->controller.chans[n]; in sun6i_msgbox_irq()
86 uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n)); in sun6i_msgbox_irq()
88 mbox_dbg(mbox, "Channel %d received 0x%08x\n", n, msg); in sun6i_msgbox_irq()
93 writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG); in sun6i_msgbox_irq()
101 struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); in sun6i_msgbox_send_data() local
[all …]
Dbcm2835-mailbox.c63 return container_of(link->mbox, struct bcm2835_mbox, controller); in bcm2835_link_mbox()
68 struct bcm2835_mbox *mbox = dev_id; in bcm2835_mbox_irq() local
69 struct device *dev = mbox->controller.dev; in bcm2835_mbox_irq()
70 struct mbox_chan *link = &mbox->controller.chans[0]; in bcm2835_mbox_irq()
72 while (!(readl(mbox->regs + MAIL0_STA) & ARM_MS_EMPTY)) { in bcm2835_mbox_irq()
73 u32 msg = readl(mbox->regs + MAIL0_RD); in bcm2835_mbox_irq()
82 struct bcm2835_mbox *mbox = bcm2835_link_mbox(link); in bcm2835_send_data() local
85 spin_lock(&mbox->lock); in bcm2835_send_data()
86 writel(msg, mbox->regs + MAIL1_WRT); in bcm2835_send_data()
87 dev_dbg(mbox->controller.dev, "Request 0x%08X\n", msg); in bcm2835_send_data()
[all …]
Darmada-37xx-rwtm-mailbox.c45 struct a37xx_mbox *mbox = chan->con_priv; in a37xx_mbox_receive() local
49 rx_msg.retval = readl(mbox->base + RWTM_MBOX_RETURN_STATUS); in a37xx_mbox_receive()
51 rx_msg.status[i] = readl(mbox->base + RWTM_MBOX_STATUS(i)); in a37xx_mbox_receive()
59 struct a37xx_mbox *mbox = chan->con_priv; in a37xx_mbox_irq_handler() local
62 reg = readl(mbox->base + RWTM_HOST_INT_RESET); in a37xx_mbox_irq_handler()
68 dev_err(mbox->dev, "Secure processor command queue full\n"); in a37xx_mbox_irq_handler()
70 writel(reg, mbox->base + RWTM_HOST_INT_RESET); in a37xx_mbox_irq_handler()
79 struct a37xx_mbox *mbox = chan->con_priv; in a37xx_mbox_send_data() local
87 reg = readl(mbox->base + RWTM_MBOX_FIFO_STATUS); in a37xx_mbox_send_data()
89 dev_warn(mbox->dev, "Secure processor not ready\n"); in a37xx_mbox_send_data()
[all …]
Domap-mailbox.c68 struct omap_mbox *mbox; member
144 static u32 mbox_fifo_read(struct omap_mbox *mbox) in mbox_fifo_read() argument
146 struct omap_mbox_fifo *fifo = &mbox->rx_fifo; in mbox_fifo_read()
148 return mbox_read_reg(mbox->parent, fifo->msg); in mbox_fifo_read()
151 static void mbox_fifo_write(struct omap_mbox *mbox, u32 msg) in mbox_fifo_write() argument
153 struct omap_mbox_fifo *fifo = &mbox->tx_fifo; in mbox_fifo_write()
155 mbox_write_reg(mbox->parent, msg, fifo->msg); in mbox_fifo_write()
158 static int mbox_fifo_empty(struct omap_mbox *mbox) in mbox_fifo_empty() argument
160 struct omap_mbox_fifo *fifo = &mbox->rx_fifo; in mbox_fifo_empty()
162 return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0); in mbox_fifo_empty()
[all …]
Dhi3660-mailbox.c25 #define MBOX_BASE(mbox, ch) ((mbox)->base + ((ch) * 0x40)) argument
80 static struct hi3660_mbox *to_hi3660_mbox(struct mbox_controller *mbox) in to_hi3660_mbox() argument
82 return container_of(mbox, struct hi3660_mbox, controller); in to_hi3660_mbox()
88 struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox); in hi3660_mbox_check_state() local
89 struct hi3660_chan_info *mchan = &mbox->mchan[ch]; in hi3660_mbox_check_state()
90 void __iomem *base = MBOX_BASE(mbox, ch); in hi3660_mbox_check_state()
102 dev_err(mbox->dev, "%s: timeout for receiving ack\n", __func__); in hi3660_mbox_check_state()
114 struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox); in hi3660_mbox_unlock() local
118 writel(MBOX_IPC_UNLOCK, mbox->base + MBOX_IPC_LOCK_REG); in hi3660_mbox_unlock()
120 val = readl(mbox->base + MBOX_IPC_LOCK_REG); in hi3660_mbox_unlock()
[all …]
Dmailbox.c78 err = chan->mbox->ops->send_data(chan, data); in msg_submit()
88 spin_lock_irqsave(&chan->mbox->poll_hrt_lock, flags); in msg_submit()
89 hrtimer_start(&chan->mbox->poll_hrt, 0, HRTIMER_MODE_REL); in msg_submit()
90 spin_unlock_irqrestore(&chan->mbox->poll_hrt_lock, flags); in msg_submit()
120 struct mbox_controller *mbox = in txdone_hrtimer() local
126 for (i = 0; i < mbox->num_chans; i++) { in txdone_hrtimer()
127 struct mbox_chan *chan = &mbox->chans[i]; in txdone_hrtimer()
130 txdone = chan->mbox->ops->last_tx_done(chan); in txdone_hrtimer()
139 spin_lock_irqsave(&mbox->poll_hrt_lock, flags); in txdone_hrtimer()
141 hrtimer_forward_now(hrtimer, ms_to_ktime(mbox->txpoll_period)); in txdone_hrtimer()
[all …]
Darm_mhu_db.c41 struct mbox_controller mbox; member
59 mhu_db_mbox_to_channel(struct mbox_controller *mbox, unsigned int pchan, in mhu_db_mbox_to_channel() argument
65 for (i = 0; i < mbox->num_chans; i++) { in mhu_db_mbox_to_channel()
66 chan_info = mbox->chans[i].con_priv; in mhu_db_mbox_to_channel()
69 return &mbox->chans[i]; in mhu_db_mbox_to_channel()
99 struct mbox_controller *mbox = &mhu->mbox; in mhu_db_mbox_irq_to_channel() local
112 chan = mhu_db_mbox_to_channel(mbox, pchan, doorbell); in mhu_db_mbox_irq_to_channel()
115 dev_err(mbox->dev, in mhu_db_mbox_irq_to_channel()
168 struct mbox_controller *mbox = &chan_info->mhu->mbox; in mhu_db_shutdown() local
171 for (i = 0; i < mbox->num_chans; i++) in mhu_db_shutdown()
[all …]
Dmtk-adsp-mailbox.c19 struct mbox_controller mbox; member
31 static inline struct mtk_adsp_mbox_priv *get_mtk_adsp_mbox_priv(struct mbox_controller *mbox) in get_mtk_adsp_mbox_priv() argument
33 return container_of(mbox, struct mtk_adsp_mbox_priv, mbox); in get_mtk_adsp_mbox_priv()
39 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox); in mtk_adsp_mbox_irq()
56 static struct mbox_chan *mtk_adsp_mbox_xlate(struct mbox_controller *mbox, in mtk_adsp_mbox_xlate() argument
59 return mbox->chans; in mtk_adsp_mbox_xlate()
64 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox); in mtk_adsp_mbox_startup()
75 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox); in mtk_adsp_mbox_shutdown()
84 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox); in mtk_adsp_mbox_send_data()
94 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox); in mtk_adsp_mbox_last_tx_done()
[all …]
Dmailbox-sti.c55 struct mbox_controller *mbox; member
97 struct mbox_chan *sti_mbox_to_channel(struct mbox_controller *mbox, in sti_mbox_to_channel() argument
104 for (i = 0; i < mbox->num_chans; i++) { in sti_mbox_to_channel()
105 chan_info = mbox->chans[i].con_priv; in sti_mbox_to_channel()
109 return &mbox->chans[i]; in sti_mbox_to_channel()
112 dev_err(mbox->dev, in sti_mbox_to_channel()
163 struct mbox_controller *mbox = mdev->mbox; in sti_mbox_irq_to_channel() local
179 chan = sti_mbox_to_channel(mbox, instance, channel); in sti_mbox_irq_to_channel()
181 dev_dbg(mbox->dev, in sti_mbox_irq_to_channel()
303 struct mbox_controller *mbox = chan_info->mdev->mbox; in sti_mbox_shutdown_chan() local
[all …]
Dapple-mailbox.c313 static struct mbox_chan *apple_mbox_of_xlate(struct mbox_controller *mbox, in apple_mbox_of_xlate() argument
319 return &mbox->chans[0]; in apple_mbox_of_xlate()
327 struct apple_mbox *mbox; in apple_mbox_probe() local
336 mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL); in apple_mbox_probe()
337 if (!mbox) in apple_mbox_probe()
339 platform_set_drvdata(pdev, mbox); in apple_mbox_probe()
341 mbox->dev = dev; in apple_mbox_probe()
342 mbox->regs = devm_platform_ioremap_resource(pdev, 0); in apple_mbox_probe()
343 if (IS_ERR(mbox->regs)) in apple_mbox_probe()
344 return PTR_ERR(mbox->regs); in apple_mbox_probe()
[all …]
/linux-6.6.21/drivers/net/ethernet/marvell/octeontx2/af/
Dmbox.c18 void __otx2_mbox_reset(struct otx2_mbox *mbox, int devid) in __otx2_mbox_reset() argument
20 struct otx2_mbox_dev *mdev = &mbox->dev[devid]; in __otx2_mbox_reset()
24 tx_hdr = hw_mbase + mbox->tx_start; in __otx2_mbox_reset()
25 rx_hdr = hw_mbase + mbox->rx_start; in __otx2_mbox_reset()
36 void otx2_mbox_reset(struct otx2_mbox *mbox, int devid) in otx2_mbox_reset() argument
38 struct otx2_mbox_dev *mdev = &mbox->dev[devid]; in otx2_mbox_reset()
41 __otx2_mbox_reset(mbox, devid); in otx2_mbox_reset()
46 void otx2_mbox_destroy(struct otx2_mbox *mbox) in otx2_mbox_destroy() argument
48 mbox->reg_base = NULL; in otx2_mbox_destroy()
49 mbox->hwbase = NULL; in otx2_mbox_destroy()
[all …]
/linux-6.6.21/drivers/net/ethernet/marvell/octeon_ep/
Doctep_ctrl_mbox.c74 int octep_ctrl_mbox_init(struct octep_ctrl_mbox *mbox) in octep_ctrl_mbox_init() argument
78 if (!mbox) in octep_ctrl_mbox_init()
81 if (!mbox->barmem) { in octep_ctrl_mbox_init()
82 pr_info("octep_ctrl_mbox : Invalid barmem %p\n", mbox->barmem); in octep_ctrl_mbox_init()
86 magic_num = readq(OCTEP_CTRL_MBOX_INFO_MAGIC_NUM(mbox->barmem)); in octep_ctrl_mbox_init()
92 status = readq(OCTEP_CTRL_MBOX_INFO_FW_STATUS(mbox->barmem)); in octep_ctrl_mbox_init()
98 fw_versions = readq(OCTEP_CTRL_MBOX_INFO_FW_VERSION(mbox->barmem)); in octep_ctrl_mbox_init()
99 mbox->min_fw_version = ((fw_versions & 0xffffffff00000000ull) >> 32); in octep_ctrl_mbox_init()
100 mbox->max_fw_version = (fw_versions & 0xffffffff); in octep_ctrl_mbox_init()
101 mbox->barmem_sz = readl(OCTEP_CTRL_MBOX_INFO_BARMEM_SZ(mbox->barmem)); in octep_ctrl_mbox_init()
[all …]
/linux-6.6.21/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_dmac_flt.c17 mutex_lock(&pf->mbox.lock); in otx2_dmacflt_do_add()
19 req = otx2_mbox_alloc_msg_cgx_mac_addr_add(&pf->mbox); in otx2_dmacflt_do_add()
21 mutex_unlock(&pf->mbox.lock); in otx2_dmacflt_do_add()
26 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_dmacflt_do_add()
30 otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &req->hdr); in otx2_dmacflt_do_add()
34 mutex_unlock(&pf->mbox.lock); in otx2_dmacflt_do_add()
44 mutex_lock(&pf->mbox.lock); in otx2_dmacflt_add_pfmac()
46 req = otx2_mbox_alloc_msg_cgx_mac_addr_set(&pf->mbox); in otx2_dmacflt_add_pfmac()
48 mutex_unlock(&pf->mbox.lock); in otx2_dmacflt_add_pfmac()
55 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_dmacflt_add_pfmac()
[all …]
Dotx2_vf.c89 struct otx2_mbox *mbox; in otx2vf_vfaf_mbox_handler() local
90 struct mbox *af_mbox; in otx2vf_vfaf_mbox_handler()
93 af_mbox = container_of(work, struct mbox, mbox_wrk); in otx2vf_vfaf_mbox_handler()
94 mbox = &af_mbox->mbox; in otx2vf_vfaf_mbox_handler()
95 mdev = &mbox->dev[0]; in otx2vf_vfaf_mbox_handler()
96 rsp_hdr = (struct mbox_hdr *)(mdev->mbase + mbox->rx_start); in otx2vf_vfaf_mbox_handler()
99 offset = mbox->rx_start + ALIGN(sizeof(*rsp_hdr), MBOX_MSG_ALIGN); in otx2vf_vfaf_mbox_handler()
104 offset = mbox->rx_start + msg->next_msgoff; in otx2vf_vfaf_mbox_handler()
106 __otx2_mbox_reset(mbox, 0); in otx2vf_vfaf_mbox_handler()
119 otx2_reply_invalid_msg(&vf->mbox.mbox_up, 0, 0, req->id); in otx2vf_process_mbox_msg_up()
[all …]
Dotx2_ptp.c22 mutex_lock(&ptp->nic->mbox.lock); in is_tstmp_atomic_update_supported()
23 req = otx2_mbox_alloc_msg_ptp_get_cap(&ptp->nic->mbox); in is_tstmp_atomic_update_supported()
25 mutex_unlock(&ptp->nic->mbox.lock); in is_tstmp_atomic_update_supported()
29 err = otx2_sync_mbox_msg(&ptp->nic->mbox); in is_tstmp_atomic_update_supported()
31 mutex_unlock(&ptp->nic->mbox.lock); in is_tstmp_atomic_update_supported()
34 rsp = (struct ptp_get_cap_rsp *)otx2_mbox_get_rsp(&ptp->nic->mbox.mbox, 0, in is_tstmp_atomic_update_supported()
36 mutex_unlock(&ptp->nic->mbox.lock); in is_tstmp_atomic_update_supported()
58 mutex_lock(&pfvf->mbox.lock); in otx2_ptp_hw_adjtime()
59 req = otx2_mbox_alloc_msg_ptp_op(&ptp->nic->mbox); in otx2_ptp_hw_adjtime()
61 mutex_unlock(&pfvf->mbox.lock); in otx2_ptp_hw_adjtime()
[all …]
Dotx2_pf.c117 struct mbox *mbox = &pf->mbox; in otx2_flr_handler() local
123 mutex_lock(&mbox->lock); in otx2_flr_handler()
124 req = otx2_mbox_alloc_msg_vf_flr(mbox); in otx2_flr_handler()
126 mutex_unlock(&mbox->lock); in otx2_flr_handler()
132 if (!otx2_sync_mbox_msg(&pf->mbox)) { in otx2_flr_handler()
142 mutex_unlock(&mbox->lock); in otx2_flr_handler()
295 static void otx2_queue_work(struct mbox *mw, struct workqueue_struct *mbox_wq, in otx2_queue_work()
299 struct otx2_mbox *mbox; in otx2_queue_work() local
308 mbox = &mw->mbox; in otx2_queue_work()
309 mdev = &mbox->dev[i]; in otx2_queue_work()
[all …]
/linux-6.6.21/drivers/crypto/marvell/octeontx2/
Dotx2_cpt_mbox_common.c7 int otx2_cpt_send_mbox_msg(struct otx2_mbox *mbox, struct pci_dev *pdev) in otx2_cpt_send_mbox_msg() argument
11 otx2_mbox_msg_send(mbox, 0); in otx2_cpt_send_mbox_msg()
12 ret = otx2_mbox_wait_for_rsp(mbox, 0); in otx2_cpt_send_mbox_msg()
24 int otx2_cpt_send_ready_msg(struct otx2_mbox *mbox, struct pci_dev *pdev) in otx2_cpt_send_ready_msg() argument
28 req = otx2_mbox_alloc_msg_rsp(mbox, 0, sizeof(*req), in otx2_cpt_send_ready_msg()
38 return otx2_cpt_send_mbox_msg(mbox, pdev); in otx2_cpt_send_ready_msg()
42 int otx2_cpt_send_af_reg_requests(struct otx2_mbox *mbox, struct pci_dev *pdev) in otx2_cpt_send_af_reg_requests() argument
44 return otx2_cpt_send_mbox_msg(mbox, pdev); in otx2_cpt_send_af_reg_requests()
48 static int otx2_cpt_add_read_af_reg(struct otx2_mbox *mbox, in otx2_cpt_add_read_af_reg() argument
55 otx2_mbox_alloc_msg_rsp(mbox, 0, sizeof(*reg_msg), in otx2_cpt_add_read_af_reg()
[all …]
/linux-6.6.21/drivers/net/wireless/ti/wl18xx/
Devent.c118 struct wl18xx_event_mailbox *mbox = wl->mbox; in wl18xx_process_mailbox_events() local
121 vector = le32_to_cpu(mbox->events_vector); in wl18xx_process_mailbox_events()
126 mbox->number_of_scan_results); in wl18xx_process_mailbox_events()
134 le16_to_cpu(mbox->time_sync_tsf_high_msb), in wl18xx_process_mailbox_events()
135 le16_to_cpu(mbox->time_sync_tsf_high_lsb), in wl18xx_process_mailbox_events()
136 le16_to_cpu(mbox->time_sync_tsf_low_msb), in wl18xx_process_mailbox_events()
137 le16_to_cpu(mbox->time_sync_tsf_low_lsb)); in wl18xx_process_mailbox_events()
141 mbox->radar_channel, in wl18xx_process_mailbox_events()
142 wl18xx_radar_type_decode(mbox->radar_type)); in wl18xx_process_mailbox_events()
151 mbox->number_of_sched_scan_results); in wl18xx_process_mailbox_events()
[all …]
/linux-6.6.21/drivers/gpu/drm/i915/
Dintel_pcode.c10 static int gen6_check_mailbox_status(u32 mbox) in gen6_check_mailbox_status() argument
12 switch (mbox & GEN6_PCODE_ERROR_MASK) { in gen6_check_mailbox_status()
25 MISSING_CASE(mbox & GEN6_PCODE_ERROR_MASK); in gen6_check_mailbox_status()
30 static int gen7_check_mailbox_status(u32 mbox) in gen7_check_mailbox_status() argument
32 switch (mbox & GEN6_PCODE_ERROR_MASK) { in gen7_check_mailbox_status()
50 MISSING_CASE(mbox & GEN6_PCODE_ERROR_MASK); in gen7_check_mailbox_status()
55 static int __snb_pcode_rw(struct intel_uncore *uncore, u32 mbox, in __snb_pcode_rw() argument
74 GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox); in __snb_pcode_rw()
81 &mbox)) in __snb_pcode_rw()
90 return gen7_check_mailbox_status(mbox); in __snb_pcode_rw()
[all …]
/linux-6.6.21/drivers/net/wireless/ti/wl1251/
Devent.c16 struct event_mailbox *mbox) in wl1251_event_scan_complete() argument
21 mbox->scheduled_scan_status, in wl1251_event_scan_complete()
22 mbox->scheduled_scan_channels); in wl1251_event_scan_complete()
41 struct event_mailbox *mbox) in wl1251_event_ps_report() argument
45 wl1251_debug(DEBUG_EVENT, "ps status: %x", mbox->ps_status); in wl1251_event_ps_report()
47 switch (mbox->ps_status) { in wl1251_event_ps_report()
76 static void wl1251_event_mbox_dump(struct event_mailbox *mbox) in wl1251_event_mbox_dump() argument
79 wl1251_debug(DEBUG_EVENT, "\tvector: 0x%x", mbox->events_vector); in wl1251_event_mbox_dump()
80 wl1251_debug(DEBUG_EVENT, "\tmask: 0x%x", mbox->events_mask); in wl1251_event_mbox_dump()
83 static int wl1251_event_process(struct wl1251 *wl, struct event_mailbox *mbox) in wl1251_event_process() argument
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/linux-6.6.21/drivers/rapidio/devices/
Dtsi721.c614 int mbox; in tsi721_omsg_msix() local
616 mbox = (irq - priv->msix[TSI721_VECT_OMB0_DONE].vector) % RIO_MAX_MBOX; in tsi721_omsg_msix()
617 tsi721_omsg_handler(priv, mbox); in tsi721_omsg_msix()
631 int mbox; in tsi721_imsg_msix() local
633 mbox = (irq - priv->msix[TSI721_VECT_IMB0_RCV].vector) % RIO_MAX_MBOX; in tsi721_imsg_msix()
634 tsi721_imsg_handler(priv, mbox + 4); in tsi721_imsg_msix()
1667 tsi721_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, in tsi721_add_outb_message() argument
1675 if (!priv->omsg_init[mbox] || in tsi721_add_outb_message()
1679 spin_lock_irqsave(&priv->omsg_ring[mbox].lock, flags); in tsi721_add_outb_message()
1681 tx_slot = priv->omsg_ring[mbox].tx_slot; in tsi721_add_outb_message()
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