/linux-6.6.21/tools/testing/selftests/bpf/progs/ |
D | cpumask_success.c | 27 struct bpf_cpumask *mask1, *mask2, *mask3, *mask4; in create_cpumask_set() local 33 mask2 = create_cpumask(); in create_cpumask_set() 34 if (!mask2) { in create_cpumask_set() 43 bpf_cpumask_release(mask2); in create_cpumask_set() 51 bpf_cpumask_release(mask2); in create_cpumask_set() 58 *out2 = mask2; in create_cpumask_set() 181 struct bpf_cpumask *mask1, *mask2; in BPF_PROG() local 191 mask2 = create_cpumask(); in BPF_PROG() 192 if (!mask2) in BPF_PROG() 196 bpf_cpumask_set_cpu(1, mask2); in BPF_PROG() [all …]
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/linux-6.6.21/drivers/soc/fsl/qe/ |
D | gpio.c | 242 u32 mask2 = 0x3 << (QE_PIO_PINS - (pin % (QE_PIO_PINS / 2) + 1) * 2); in qe_pin_set_dedicated() local 249 qe_clrsetbits_be32(®s->cpdir2, mask2, in qe_pin_set_dedicated() 250 sregs->cpdir2 & mask2); in qe_pin_set_dedicated() 251 qe_clrsetbits_be32(®s->cppar2, mask2, in qe_pin_set_dedicated() 252 sregs->cppar2 & mask2); in qe_pin_set_dedicated() 254 qe_clrsetbits_be32(®s->cpdir1, mask2, in qe_pin_set_dedicated() 255 sregs->cpdir1 & mask2); in qe_pin_set_dedicated() 256 qe_clrsetbits_be32(®s->cppar1, mask2, in qe_pin_set_dedicated() 257 sregs->cppar1 & mask2); in qe_pin_set_dedicated()
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/linux-6.6.21/fs/orangefs/ |
D | orangefs-debugfs.c | 64 __u64 mask2; member 457 c_mask.mask2); in orangefs_debug_write() 544 (unsigned long long *)&(cdm_array[i].mask2)); in orangefs_prepare_cdm_array() 756 (mask->mask2 & cdm_array[index].mask2)) { in do_c_string() 800 (c_mask->mask2 == cdm_array[client_all_index].mask2)) { in check_amalgam_keyword() 807 (c_mask->mask2 == cdm_array[client_verbose_index].mask2)) { in check_amalgam_keyword() 876 (**sane_mask).mask2 = (**sane_mask).mask2 | cdm_array[i].mask2; in do_c_mask() 901 client_debug_mask.mask2 = mask2_info.mask2_value; in orangefs_debugfs_new_client_mask() 907 (unsigned long long)client_debug_mask.mask2); in orangefs_debugfs_new_client_mask()
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/linux-6.6.21/sound/pci/ice1712/ |
D | wm8776.c | 136 .mask2 = WM8776_DACVOL_MASK, 146 .mask2 = WM8776_DAC_PL_RR, 162 .mask2 = WM8776_HPVOL_MASK, 180 .mask2 = WM8776_VOL_HPZCEN, 207 .mask2 = WM8776_PHASE_INVERTR, 223 .mask2 = WM8776_ADC_GAIN_MASK, 233 .mask2 = WM8776_ADC_MUTER, 488 val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2; in snd_wm8776_ctl_get() 489 val2 >>= __ffs(wm->ctl[n].mask2); in snd_wm8776_ctl_get() 528 val &= ~wm->ctl[n].mask2; in snd_wm8776_ctl_put() [all …]
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D | wm8766.c | 37 .mask2 = WM8766_VOL_MASK, 48 .mask2 = WM8766_VOL_MASK, 59 .mask2 = WM8766_VOL_MASK, 218 val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2; in snd_wm8766_ctl_get() 219 val2 >>= __ffs(wm->ctl[n].mask2); in snd_wm8766_ctl_get() 258 val &= ~wm->ctl[n].mask2; in snd_wm8766_ctl_put() 259 val |= regval2 << __ffs(wm->ctl[n].mask2); in snd_wm8766_ctl_put() 265 val = wm->regs[wm->ctl[n].reg2] & ~wm->ctl[n].mask2; in snd_wm8766_ctl_put() 266 val |= regval2 << __ffs(wm->ctl[n].mask2); in snd_wm8766_ctl_put()
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/linux-6.6.21/arch/mips/sgi-ip22/ |
D | ip22-int.c | 114 u8 mask2; in indy_local0_irqdispatch() local 118 mask2 = sgint->vmeistat & sgint->cmeimask0; in indy_local0_irqdispatch() 119 irq = lc2msk_to_irqnr[mask2]; in indy_local0_irqdispatch() 136 u8 mask2; in indy_local1_irqdispatch() local 140 mask2 = sgint->vmeistat & sgint->cmeimask1; in indy_local1_irqdispatch() 141 irq = lc3msk_to_irqnr[mask2]; in indy_local1_irqdispatch()
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/ |
D | dc_helper.c | 290 uint8_t shift2, uint32_t mask2, uint32_t *field_value2) in generic_reg_get2() argument 294 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get2() 300 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get3() argument 305 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get3() 312 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get4() argument 318 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get4() 326 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get5() argument 333 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get5() 342 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get6() argument 350 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get6() [all …]
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/linux-6.6.21/drivers/net/wireless/ath/ath9k/ |
D | ar9002_mac.c | 36 u32 mask2 = 0; in ar9002_hw_get_isr() local 67 mask2 |= ATH9K_INT_TIM; in ar9002_hw_get_isr() 69 mask2 |= ATH9K_INT_DTIM; in ar9002_hw_get_isr() 71 mask2 |= ATH9K_INT_DTIMSYNC; in ar9002_hw_get_isr() 73 mask2 |= ATH9K_INT_CABEND; in ar9002_hw_get_isr() 75 mask2 |= ATH9K_INT_GTT; in ar9002_hw_get_isr() 77 mask2 |= ATH9K_INT_CST; in ar9002_hw_get_isr() 79 mask2 |= ATH9K_INT_TSFOOR; in ar9002_hw_get_isr() 134 *masked |= mask2; in ar9002_hw_get_isr()
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D | ar9003_mac.c | 187 u32 mask2 = 0; in ar9003_hw_get_isr() local 217 mask2 |= ((isr2 & AR_ISR_S2_TIM) >> in ar9003_hw_get_isr() 219 mask2 |= ((isr2 & AR_ISR_S2_DTIM) >> in ar9003_hw_get_isr() 221 mask2 |= ((isr2 & AR_ISR_S2_DTIMSYNC) >> in ar9003_hw_get_isr() 223 mask2 |= ((isr2 & AR_ISR_S2_CABEND) >> in ar9003_hw_get_isr() 225 mask2 |= ((isr2 & AR_ISR_S2_GTT) << in ar9003_hw_get_isr() 227 mask2 |= ((isr2 & AR_ISR_S2_CST) << in ar9003_hw_get_isr() 229 mask2 |= ((isr2 & AR_ISR_S2_TSFOOR) >> in ar9003_hw_get_isr() 231 mask2 |= ((isr2 & AR_ISR_S2_BB_WATCHDOG) >> in ar9003_hw_get_isr() 303 *masked |= mask2; in ar9003_hw_get_isr()
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D | mac.c | 911 u32 mask, mask2; in ath9k_hw_set_interrupts() local 928 mask2 = 0; in ath9k_hw_set_interrupts() 972 mask2 |= AR_IMR_S2_TIM; in ath9k_hw_set_interrupts() 974 mask2 |= AR_IMR_S2_DTIM; in ath9k_hw_set_interrupts() 976 mask2 |= AR_IMR_S2_DTIMSYNC; in ath9k_hw_set_interrupts() 978 mask2 |= AR_IMR_S2_CABEND; in ath9k_hw_set_interrupts() 980 mask2 |= AR_IMR_S2_TSFOOR; in ath9k_hw_set_interrupts() 986 mask2 |= AR_IMR_S2_GTT; in ath9k_hw_set_interrupts() 988 mask2 |= AR_IMR_S2_CST; in ath9k_hw_set_interrupts() 994 mask2 |= AR_IMR_S2_BB_WATCHDOG; in ath9k_hw_set_interrupts() [all …]
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
D | irq_service_dcn21.c | 215 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument 225 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 227 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 229 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument 239 reg2 ## __ ## mask2 ## _MASK,\ 241 reg2 ## __ ## mask2 ## _MASK \
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/irq/dcn30/ |
D | irq_service_dcn30.c | 220 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument 230 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 232 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 234 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument 244 reg2 ## __ ## mask2 ## _MASK,\ 246 reg2 ## __ ## mask2 ## _MASK \
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/irq/dcn302/ |
D | irq_service_dcn302.c | 195 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument 203 .ack_mask = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 204 .ack_value = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 213 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument 223 reg2 ## __ ## mask2 ## _MASK,\ 225 reg2 ## __ ## mask2 ## _MASK \
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/irq/dcn31/ |
D | irq_service_dcn31.c | 208 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument 218 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 220 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 222 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument 232 reg2 ## __ ## mask2 ## _MASK,\ 234 reg2 ## __ ## mask2 ## _MASK \
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/irq/dcn314/ |
D | irq_service_dcn314.c | 210 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument 220 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 222 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 224 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument 234 reg2 ## __ ## mask2 ## _MASK,\ 236 reg2 ## __ ## mask2 ## _MASK \
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/irq/dcn315/ |
D | irq_service_dcn315.c | 215 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument 225 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 227 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 229 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument 239 reg2 ## __ ## mask2 ## _MASK,\ 241 reg2 ## __ ## mask2 ## _MASK \
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/irq/dcn32/ |
D | irq_service_dcn32.c | 209 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument 219 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 221 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 223 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument 233 reg2 ## __ ## mask2 ## _MASK,\ 235 reg2 ## __ ## mask2 ## _MASK \
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/linux-6.6.21/drivers/net/hamradio/ |
D | baycom_par.c | 206 unsigned int data, mask, mask2, descx; in par96_rx() local 235 for(mask = 0x1fe00, mask2 = 0xfc00, i = 0; in par96_rx() 236 i < PAR96_BURSTBITS; i++, mask <<= 1, mask2 <<= 1) in par96_rx() 237 if ((bc->modem.par96.dcd_shreg & mask) == mask2) in par96_rx() 240 for(mask = 0x1fe00, mask2 = 0x1fe00, i = 0; in par96_rx() 241 i < PAR96_BURSTBITS; i++, mask <<= 1, mask2 <<= 1) in par96_rx() 242 if (((bc->modem.par96.dcd_shreg & mask) == mask2) && in par96_rx()
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D | hdlcdrv.c | 159 unsigned int mask1, mask2, mask3, mask4, mask5, mask6, word; in hdlcdrv_receiver() local 177 for(i = 15, mask1 = 0x1fc00, mask2 = 0x1fe00, mask3 = 0x0fc00, in hdlcdrv_receiver() 180 i--, mask1 <<= 1, mask2 <<= 1, mask3 <<= 1, mask4 <<= 1, in hdlcdrv_receiver() 184 else if ((s->hdlcrx.bitstream & mask2) == mask3) { in hdlcdrv_receiver() 255 unsigned int mask1, mask2, mask3; in hdlcdrv_transmitter() local 331 mask2 = 0x10000; in hdlcdrv_transmitter() 334 for(i = 0; i < 8; i++, mask1 <<= 1, mask2 <<= 1, in hdlcdrv_transmitter() 338 s->hdlctx.bitstream &= ~mask2; in hdlcdrv_transmitter()
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/linux-6.6.21/arch/alpha/kernel/ |
D | sys_titan.c | 69 unsigned long mask0, mask1, mask2, mask3, dummy; in titan_update_irq_hw() local 75 mask2 = mask & titan_cpu_irq_affinity[2]; in titan_update_irq_hw() 80 else if (bcpu == 2) mask2 |= isa_enable; in titan_update_irq_hw() 94 *dim2 = mask2; in titan_update_irq_hw()
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/linux-6.6.21/include/linux/ |
D | cpumask.h | 332 #define for_each_cpu_and(cpu, mask1, mask2) \ argument 333 for_each_and_bit(cpu, cpumask_bits(mask1), cpumask_bits(mask2), small_cpumask_bits) 350 #define for_each_cpu_andnot(cpu, mask1, mask2) \ argument 351 for_each_andnot_bit(cpu, cpumask_bits(mask1), cpumask_bits(mask2), small_cpumask_bits) 367 #define for_each_cpu_or(cpu, mask1, mask2) \ argument 368 for_each_or_bit(cpu, cpumask_bits(mask1), cpumask_bits(mask2), small_cpumask_bits) 758 #define cpumask_any_and(mask1, mask2) cpumask_first_and((mask1), (mask2)) argument
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/linux-6.6.21/fs/affs/ |
D | bitmap.c | 122 u32 blk, bmap, bit, mask, mask2, tmp; in affs_alloc_block() local 208 mask2 = mask = 1 << (bit & 31); in affs_alloc_block() 212 while ((mask2 <<= 1)) { in affs_alloc_block() 213 if (!(tmp & mask2)) in affs_alloc_block() 216 mask |= mask2; in affs_alloc_block()
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/linux-6.6.21/drivers/media/test-drivers/vidtv/ |
D | vidtv_pes.c | 89 u64 mask2; in vidtv_pes_write_pts_dts() local 96 mask2 = GENMASK_ULL(29, 15); in vidtv_pes_write_pts_dts() 102 pts_dts.pts2 = cpu_to_be16(((args->pts & mask2) >> 14) | 0x1); in vidtv_pes_write_pts_dts() 106 pts_dts.dts2 = cpu_to_be16(((args->dts & mask2) >> 14) | 0x1); in vidtv_pes_write_pts_dts() 114 pts.pts2 = cpu_to_be16(((args->pts & mask2) >> 14) | 0x1); in vidtv_pes_write_pts_dts()
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/linux-6.6.21/lib/ |
D | cpumask_kunit.c | 26 #define EXPECT_FOR_EACH_CPU_OP_EQ(test, op, mask1, mask2) \ argument 29 const cpumask_t *m2 = (mask2); \ 34 for_each_cpu_##op(cpu, mask1, mask2) \
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/linux-6.6.21/Documentation/bpf/ |
D | cpumasks.rst | 291 struct bpf_cpumask *mask1, *mask2, *dst1, *dst2; 297 mask2 = bpf_cpumask_create(); 298 if (!mask2) { 306 bpf_cpumask_set_cpu(1, mask2); 307 bpf_cpumask_and(dst1, (const struct cpumask *)mask1, (const struct cpumask *)mask2); 312 bpf_cpumask_or(dst1, (const struct cpumask *)mask1, (const struct cpumask *)mask2); 321 bpf_cpumask_xor(dst2, (const struct cpumask *)mask1, (const struct cpumask *)mask2); 329 bpf_cpumask_release(mask2);
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