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Searched refs:ixSE_CAC_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega10_powertune.c363 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
364 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
365 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
366 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
367 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
368 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
369 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
370 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
371 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
373 …{ ixSE_CAC_CNTL, 0xFFFFFFFF, 0, …
[all …]
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h7089 #define ixSE_CAC_CNTL macro
Dgc_9_1_offset.h7297 #define ixSE_CAC_CNTL macro
Dgc_9_2_1_offset.h7336 #define ixSE_CAC_CNTL macro
Dgc_9_4_2_offset.h7635 #define ixSE_CAC_CNTL macro
Dgc_10_1_0_offset.h11002 #define ixSE_CAC_CNTL macro
Dgc_11_0_0_offset.h11429 #define ixSE_CAC_CNTL macro
Dgc_11_0_3_offset.h11847 #define ixSE_CAC_CNTL macro
Dgc_10_3_0_offset.h13070 #define ixSE_CAC_CNTL macro