Home
last modified time | relevance | path

Searched refs:ixGRA05 (Results 1 – 19 of 19) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h306 #define ixGRA05 0x0005 macro
Ddce_8_0_d.h5105 #define ixGRA05 0x5 macro
Ddce_10_0_d.h5988 #define ixGRA05 0x5 macro
Ddce_11_0_d.h6065 #define ixGRA05 0x5 macro
Ddce_11_2_d.h7739 #define ixGRA05 0x5 macro
Ddce_12_0_offset.h18178 #define ixGRA05 … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7227 #define ixGRA05 … macro
Ddcn_3_0_1_offset.h12070 #define ixGRA05 … macro
Ddcn_2_1_0_offset.h12674 #define ixGRA05 … macro
Ddcn_1_0_offset.h12809 #define ixGRA05 … macro
Ddcn_3_1_4_offset.h120 #define ixGRA05 … macro
Ddcn_3_2_1_offset.h13360 #define ixGRA05 … macro
Ddcn_3_1_2_offset.h13884 #define ixGRA05 … macro
Ddcn_3_2_0_offset.h13381 #define ixGRA05 … macro
Ddcn_3_1_5_offset.h13990 #define ixGRA05 … macro
Ddcn_3_0_2_offset.h14963 #define ixGRA05 … macro
Ddcn_3_1_6_offset.h14481 #define ixGRA05 … macro
Ddcn_2_0_0_offset.h16338 #define ixGRA05 … macro
Ddcn_3_0_0_offset.h16687 #define ixGRA05 … macro