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Searched refs:ixGRA01 (Results 1 – 19 of 19) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h302 #define ixGRA01 0x0001 macro
Ddce_8_0_d.h5101 #define ixGRA01 0x1 macro
Ddce_10_0_d.h5984 #define ixGRA01 0x1 macro
Ddce_11_0_d.h6061 #define ixGRA01 0x1 macro
Ddce_11_2_d.h7735 #define ixGRA01 0x1 macro
Ddce_12_0_offset.h18174 #define ixGRA01 … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7223 #define ixGRA01 … macro
Ddcn_3_0_1_offset.h12066 #define ixGRA01 … macro
Ddcn_2_1_0_offset.h12670 #define ixGRA01 … macro
Ddcn_1_0_offset.h12805 #define ixGRA01 … macro
Ddcn_3_1_4_offset.h116 #define ixGRA01 … macro
Ddcn_3_2_1_offset.h13356 #define ixGRA01 … macro
Ddcn_3_1_2_offset.h13880 #define ixGRA01 … macro
Ddcn_3_2_0_offset.h13377 #define ixGRA01 … macro
Ddcn_3_1_5_offset.h13986 #define ixGRA01 … macro
Ddcn_3_0_2_offset.h14959 #define ixGRA01 … macro
Ddcn_3_1_6_offset.h14477 #define ixGRA01 … macro
Ddcn_2_0_0_offset.h16334 #define ixGRA01 … macro
Ddcn_3_0_0_offset.h16683 #define ixGRA01 … macro