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Searched refs:ixGCK_DFS_BYPASS_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dpolaris_baco.c62 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixGCK_DFS_BYPASS_CNTL },
148 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixGCK_DFS_BYPASS_CNTL },
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_7_0_0_d.h44 #define ixGCK_DFS_BYPASS_CNTL 0xc0500118 macro
Dsmu_7_1_1_d.h44 #define ixGCK_DFS_BYPASS_CNTL 0xc0500118 macro
Dsmu_7_0_1_d.h44 #define ixGCK_DFS_BYPASS_CNTL 0xc0500118 macro
Dsmu_7_1_2_d.h44 #define ixGCK_DFS_BYPASS_CNTL 0xc0500118 macro
Dsmu_7_1_3_d.h47 #define ixGCK_DFS_BYPASS_CNTL 0xc0500118 macro
Dsmu_7_1_0_d.h44 #define ixGCK_DFS_BYPASS_CNTL 0xc0500118 macro
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dvce_v4_0.c909 u32 tmp = RREG32_SMC(ixGCK_DFS_BYPASS_CNTL);
916 WREG32_SMC(ixGCK_DFS_BYPASS_CNTL, tmp);
Duvd_v7_0.c1710 u32 tmp = RREG32_SMC(ixGCK_DFS_BYPASS_CNTL);
1719 WREG32_SMC(ixGCK_DFS_BYPASS_CNTL, tmp);