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Searched refs:ixAZALIA_INPUT_CRC1_CHANNEL6 (Results 1 – 17 of 17) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_d.h6714 #define ixAZALIA_INPUT_CRC1_CHANNEL6 0x6 macro
Ddce_11_0_d.h6876 #define ixAZALIA_INPUT_CRC1_CHANNEL6 0x6 macro
Ddce_11_2_d.h8221 #define ixAZALIA_INPUT_CRC1_CHANNEL6 0x6 macro
Ddce_12_0_offset.h18102 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7385 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_3_0_1_offset.h12228 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_2_1_0_offset.h12832 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_1_0_offset.h13072 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_3_1_4_offset.h198 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_3_2_1_offset.h13518 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_3_1_2_offset.h14042 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_3_2_0_offset.h13539 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_3_1_5_offset.h14148 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_3_0_2_offset.h15121 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_3_1_6_offset.h14639 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_2_0_0_offset.h16496 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro
Ddcn_3_0_0_offset.h16845 #define ixAZALIA_INPUT_CRC1_CHANNEL6 … macro