Home
last modified time | relevance | path

Searched refs:ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 (Results 1 – 19 of 19) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h162 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 0x0004 macro
Ddce_8_0_d.h5395 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 0x4 macro
Ddce_10_0_d.h6629 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 0x4 macro
Ddce_11_0_d.h6791 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 0x4 macro
Ddce_11_2_d.h8136 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 0x4 macro
Ddce_12_0_offset.h18061 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7344 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_3_0_1_offset.h12187 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_2_1_0_offset.h12791 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_1_0_offset.h13031 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_3_1_4_offset.h157 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_3_2_1_offset.h13477 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_3_1_2_offset.h14001 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_3_2_0_offset.h13498 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_3_1_5_offset.h14107 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_3_0_2_offset.h15080 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_3_1_6_offset.h14598 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_2_0_0_offset.h16455 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro
Ddcn_3_0_0_offset.h16804 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 … macro