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Searched refs:ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR (Results 1 – 17 of 17) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_d.h6938 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR 0x777c macro
Ddce_11_0_d.h7101 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR 0x777c macro
Ddce_11_2_d.h8445 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR 0x777c macro
Ddce_12_0_offset.h18021 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7433 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_3_0_1_offset.h12276 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_2_1_0_offset.h12880 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_1_0_offset.h13120 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_3_1_4_offset.h1654 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_3_2_1_offset.h13566 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_3_1_2_offset.h14090 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_3_2_0_offset.h13587 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_3_1_5_offset.h14196 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_3_0_2_offset.h15169 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_3_1_6_offset.h14687 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_2_0_0_offset.h16544 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro
Ddcn_3_0_0_offset.h16893 #define ixAZALIA_F2_CODEC_INPUT_PIN_CONTROL_HBR … macro