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Searched refs:ixAZALIA_CRC1_CHANNEL6 (Results 1 – 18 of 18) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_d.h5469 #define ixAZALIA_CRC1_CHANNEL6 0x6 macro
Ddce_10_0_d.h6740 #define ixAZALIA_CRC1_CHANNEL6 0x6 macro
Ddce_11_0_d.h6902 #define ixAZALIA_CRC1_CHANNEL6 0x6 macro
Ddce_11_2_d.h8247 #define ixAZALIA_CRC1_CHANNEL6 0x6 macro
Ddce_12_0_offset.h18126 #define ixAZALIA_CRC1_CHANNEL6 … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7409 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_3_0_1_offset.h12252 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_2_1_0_offset.h12856 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_1_0_offset.h13096 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_3_1_4_offset.h222 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_3_2_1_offset.h13542 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_3_1_2_offset.h14066 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_3_2_0_offset.h13563 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_3_1_5_offset.h14172 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_3_0_2_offset.h15145 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_3_1_6_offset.h14663 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_2_0_0_offset.h16520 #define ixAZALIA_CRC1_CHANNEL6 … macro
Ddcn_3_0_0_offset.h16869 #define ixAZALIA_CRC1_CHANNEL6 … macro