Searched refs:irqmux (Results 1 – 3 of 3) sorted by relevance
16 First type is via irqmux, single interrupt is used by multiple gpio banks. This43 - interrupts : Interrupt number of the irqmux. If the interrupt is shared44 with other gpio banks via irqmux.46 - reg : irqmux memory resource. If irqmux is present.47 - reg-names : irqmux resource should be named as "irqmux".66 irqmux or a dedicated interrupt per bank is specified.87 reg-names = "irqmux";89 interrupt-names = "irqmux";
51 reg-names = "irqmux";53 interrupt-names = "irqmux";375 reg-names = "irqmux";377 interrupt-names = "irqmux";935 reg-names = "irqmux";937 interrupt-names = "irqmux";968 reg-names = "irqmux";970 interrupt-names = "irqmux";1163 reg-names = "irqmux";1165 interrupt-names = "irqmux";
115 struct regmap_field *irqmux[STM32_GPIO_PINS_PER_BANK]; member453 regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_ioport_nr); in stm32_gpio_domain_activate()1469 pctl->irqmux[i] = devm_regmap_field_alloc(dev, rm, mux); in stm32_pctrl_dt_setup_irq()1470 if (IS_ERR(pctl->irqmux[i])) in stm32_pctrl_dt_setup_irq()1471 return PTR_ERR(pctl->irqmux[i]); in stm32_pctrl_dt_setup_irq()1729 regmap_field_write(pctl->irqmux[offset], bank->bank_ioport_nr); in stm32_pinctrl_restore_gpio_regs()